參數(shù)資料
型號(hào)： THS8210PFP
廠商： TEXAS INSTRUMENTS INC
元件分類： 消費(fèi)家電
英文描述： SPECIALTY CONSUMER CIRCUIT, PQFP80
封裝： POWER, PLASTIC, TQFP-80
文件頁(yè)數(shù)： 26/73頁(yè)
文件大?。?/td> 2053K
代理商： THS8210PFP
THS8200/8210
‘ALL-FORMAT’ OVERSAMPLED COMPONENT VIDEO/PC GRAPHICS D/A SYSTEM WITH
THREE 11 BIT DAC’S, CGMS DATA INSERTION AND 525P MACROVISION
TM COPY
PROTECTION
SLES032—6/18/02 3:33 PM
POST OFFICE BOX 655303 DALLAS TEXAS 77265
32
Copyright 2001 Texas Instruments Incorporated
PRODUCT PREVIEW information concerns products in the
formative or design phase of development. Characteristic data
and other specifications are design goals. Texas Instruments
reserves the right to change or discontinue these products
without notice.
Note that both independent sets of delay registers allow to accommodate different input timing references in slave
mode. When the device is configured in master mode, the delay registers can compensate for different external
(frame memory) synchronization requirements.
Output synchronization: composite sync
The composite sync is generated from a programmed sequence of (linetype, line_breakpoint) combinations, either
user-programmed (in generic mode) or pre-set (in preset mode). The linetype determines the waveform shape at
the output of the DAC(s) with programmable amplitudes and timings.
On each line, at the horizontal reference point of the DTG (see later on how this position is determined), the DTG
decides where to start/stop the DTG generated data and where to pass input video data (e.g. during an active
video line, ancillary data may be embedded in the digital stream outside the active video portion of the line, that we
might want to convert to analog OR during a non-active video line, where normally the predefined linetype would be
inserted, ancillary data might need to be passed during the ‘a(chǎn)ctive’ video portion of the line).
The amplitudes of positive, negative sync excursions and of the negative serration, pre- & post-equalization and
‘broad’ pulses are programmable, independently between G/Y and BPb,RPr channels. Therefore sync insertion
can be programmed on only G/Y output or all DAC outputs.
In order to limit the number of selection bits to select the linetype, and because of the fact that we can define a set
of linetypes that is mutually exclusive for SDTV and HDTV video modes, there are two DTG_video_formats: SDTV
& HDTV. There is a third DTG mode (VESA) which does not use the linetype/breakpoint state machine and only
generates Hsync/Vsync outputs.
Output synchronization: Hsync/Vsync outputs
These are the HS_OUT & VS_OUT signals, of which the width, position and polarity are programmable in all DTG
modes.
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