參數(shù)資料
型號： TS68230CFN8
廠商： 意法半導體
英文描述： HMOS PARALLEL INTERFACE/TIMER
中文描述： HMO的并行接口/定時器
文件頁數(shù)： 20/61頁
文件大小： 2911K
代理商： TS68230CFN8
Programmable Options Mode 0 - Port A Submode 00 and Port B Submode 00
PACR
7 6
0 0
Port A Submode
Submode 00
PACR
5 4 3
0 X X
1 0 0
1 0 1
1 1 0
1 1 1
H2 Control
Input pin - edge-sensitive status input, H2S is set on an asserted edge.
Output pin - negated, H2S is always clear.
Output pin - asserted, H2S is always clear.
Output pin - interlocked input handshake protocol, H2S is always clear.
Output pin - pulsed input handshake protocol, H2S is always clear.
PACR
2
0
1
H2 Interrupt Enable
The H2 interrupt is disabled.
The H2 interrupt is enabled.
PACR
1
0
1
H1 SVCR Enable
The H1 interrupt and DMA request are disabled.
The H1 interrupt and DMA request are enabled.
PACR
0
X
H1 Status Control
The H1S status bit is set anytime input data is present in the double-buffered input path.
PBCR
7 6
0 0
Port B Submode
Submode 00
PBCR
5 4 3
0 X X
1 0 0
1 0 1
1 1 0
1 1 1
H4 Control
Input pin - edge-sensitive status input, H4S is set on an asserted edge.
Output pin - negated, H4S is always cleared.
Output pin - asserted, H4S is always cleared.
Output pin - interlocked input handshake protocol, H4S is always cleared.
Output pin - pulsed input handshake protocol, H4S is always cleared.
TS68230
20/61
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