參數(shù)資料
型號(hào): TS68230CFN8
廠商: 意法半導(dǎo)體
英文描述: HMOS PARALLEL INTERFACE/TIMER
中文描述: HMO的并行接口/定時(shí)器
文件頁(yè)數(shù): 45/61頁(yè)
文件大?。?/td> 2911K
代理商: TS68230CFN8
Figure 5.2 :
Square Wave Generator Example.
5.2.3. INTERRUPT AFTER TIMEOUT.
In this configuration the timer generates an interrupt
after a programmed time period has expired. The
TOUT pin is connected to the system’s interrupt re-
quest circuitry and the TIACK pin may be an inter-
rupt acknowledge input to the timer. The TIN pin
may be used as a clock input.
This configuration is similar to the periodic interrupt
generator except that the zero detect control bit is set.
This forces the counter to roll over after zero detect is
reached, rather than reloading from the CPRs. When
the processor takes the interrupt it can halt the timer,
read the counter and calculate the time from the inter-
rupt request to entering the service routine. Accurate
knowledge of the interrupt latency may be useful in
some applications (see figure 5.3).
Figure 5.1 :
Periodic Interrupt Generator Example.
7
6
5
4
3
2
1
0
Timer
Enable
TOUT/TIACK
Control
*
Z.D
Control
Clock
Control
0
1
x
0
0
00 or 1X Changed
* Analog representation of counter value.
TS68230
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