參數(shù)資料
型號(hào)： TS68230CFN8
廠商： 意法半導(dǎo)體
英文描述： HMOS PARALLEL INTERFACE/TIMER
中文描述： HMO的并行接口/定時(shí)器
文件頁數(shù)： 9/61頁
文件大小： 2911K
代理商： TS68230CFN8
1.3. REGISTER MODEL
A register model that includes the corresponding register selects is shown in table 1.3.
Table 1.3
: Register Model.
Register
SelectBits
5 4 3 2 1
0 0 0 0 0
7
Port Mode
Control
V
6
5
4
3
2
1
0
Register
Value
after
RESET
(hex
value)
H34
Enable
H12
Enable
H4
Sense
IPF
Select
Bit
4
Bit
4
Bit
4
H3
Sense
H2
Sense
H1
Sense
0 0
Port General
Control Register
Port Service
Request Register
Port A Data
Direction Register
Port B Data
Direction Register
Port C Data
Direction Register
Port Interrupt
Vector Register
Port A Control
Register
0 0 0 0 1
SVCRQ
Select
Bit
6
Bit
6
Bit
6
Port Interrupt
Priority Control
Bit
2
Bit
2
Bit
2
0 0
0 0 0 1 0
Bit
7
Bit
7
Bit
7
Bit
5
Bit
5
Bit
5
Bit
3
Bit
3
Bit
3
Bit
1
Bit
1
Bit
1
V
Bit
0
Bit
0
Bit
0
V
0 0
0 0 0 1 1
0 0
0 0 1 0 0
0 0
0 0 1 0 1
Interrupt Vector
Number
H2 Control
0 F
0 0 1 1 0
Port A
Submode
H2
Int
Enable
H4
Int
Enable
Bit
2
Bit
2
Bit
2
Bit
2
Bit
2
H3S
H1
SVCRQ
Enable
H3
SVCRQ
Enable
Bit
1
Bit
1
Bit
1
Bit
1
Bit
1
H2S
H1
Stat
Ctrl
H3
Stat
Ctrl
Bit
0
Bit
0
Bit
0
Bit
0
Bit
0
H1S
0 0
0 0 1 1 1
Port B
Submode
H4 Control
0 0
Port B Control
Register
0 1 0 0 0
Bit
7
Bit
7
Bit
7
Bit
7
Bit
7
H4
Level
V
Bit
6
Bit
6
Bit
6
Bit
6
Bit
6
H3
Level
V
Bit
5
Bit
5
Bit
5
Bit
5
Bit
5
H2
Level
V
Bit
4
Bit
4
Bit
4
Bit
4
Bit
4
H1
Level
V
Bit
3
Bit
3
Bit
3
Bit
3
Bit
3
H4S
VV
Port A Data
Register
Port B Data
Register
Port A Alternate
Register
Port B Alternate
Register
Port C Data
Register
Port Status
Register
(null)
0 1 0 0 1
VV
0 1 0 1 0
VVV
0 1 0 1 1
VVV
0 1 1 0 0
VVVV
0 1 1 0 1
VVVV
0 1 1 1 0
V
V
V
V
0 0
0 1 1 1 1
V
V
V
V
V
V
V
V
0 0
(null)
*
Unused, read as zero.
**
Value before RESET.
***
Current value on pins.
TS68230
9/61
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