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| 型號： | TVP3010-85 |
| 廠商： | Texas Instruments, Inc. |
| 英文描述： | Hardware Cursor, GAMMA Correction VIP(85MHz,高/寬光標(biāo)，伽馬校正，視頻接口調(diào)色板) |
| 中文描述： | 硬件光標(biāo)，伽瑪校正貴賓（85MHz，高/寬光標(biāo)，伽馬校正，視頻接口調(diào)色板） |
| 文件頁數(shù)： | 59/100頁 |
| 文件大?。?/td> | 571K |
| 代理商： | TVP3010-85 |
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2–45
2.16.9
These registers are used to specify the address of where to write or read sprite cursor data from. The linear
addressing scheme is depicted in Figure 2–6 of Section 2.5.1. The cursor-RAM register is made up of the
cursor-RAM address LSB (CRAL) and the cursor-RAM address MSB (CRAM). They are not initialized and
may be written to by the MPU at any time.
Cursor-RAM Address Register
CRAL and CRAM are cascaded to form a 10-bit cursor-RAM address register. Bits D2–D7 of CRAM are
always a logical zero.
CURSOR-RAM ADDRESS MSB
(CRAM)
D6
D5
D4
CURSOR-RAM ADDRESS LSB
(CRAL)
D6
D5
D4
Data Bit
D7
D3
D2
D1
D0
D7
D3
D2
D1
D0
Address
0
0
0
0
0
0
A9
A8
A7
A6
A5
A4
A3
A2
A1
A0
Index = 09h
Index = 08h
Values from 0000 (hex) to 03FF (hex) may be written into the cursor-RAM address register. When the
cursor-RAM address is to be written, both registers must be written with the cursor-RAM address LSB being
the first.
2.16.10 Cursor-RAM Data Register
This register is used to read and write the contents of the sprite cursor locations whose address is specified
in the cursor-RAM address registers. The data read from or written to this register contain four pixels of
information and two bit planes per cursor pixel (see Figure 2–6 and Section 2.5.1). The register is not
initialized and may be written to or read from by the MPU at any time. The sprite-cursor data format is shown
below.
CURSOR-RAM DATA
D4
Data Bit
D7
D6
D5
D3
D2
D1
D0
Data
P13
P03
P12
P02
Index = 0Ah
P11
P01
P10
P00
Values from 00 (hex) to FF (hex) may be written into the cursor-RAM data register.
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