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1 Introduction
The TVP3010 palette is an advanced Video Interface Palette (VIP) from Texas Instruments implemented
in the EPIC
0.8-micron CMOS process. Maximum flexibility is provided by the pixel multiplexing scheme.
The scheme accommodates 64-, 32-, 16-, 8-, and 4-bit pixel buses without any circuit modification. This
enables the system to be easily reconfigured for varying amounts of available video RAM. The device
supports selection of little- or big-endian data format for the pixel-bus/frame-buffer interface. Data can be
split into 1, 2, 4, or 8 bit planes for pseudo-color mode or split into 12-, 16- or 24-bit true-color and direct-color
modes. For the 24-bit direct color modes, an 8-bit overlay plane is available. The 16-bit direct- and true-color
modes can be configured to IBM XGA
(5, 6, 5), TARGA
(5, 5, 5, 1), or (6, 6, 4) as another existing format.
An additional 12-bit mode (4, 4, 4, 4) is supported with 4 bits for each color and overlay. An on-chip, IBM
XGA-compatible hardware cursor is incorporated so that further increases in graphics system performance
are possible. The device is also software compatible with the IMSG176/8 and Bt476/8 color palettes.
An internal frequency doubler is incorporated, allowing convenient and cost-effective clock source
alternatives to be utilized. An auxiliary windowing function and a pixel-port-select function are provided so
that overlay or VGA graphics can be displayed on top of direct color inside or outside a specified auxiliary
window. Color-keyed switching of direct color and overlay is also supported.
Clocking is provided through one of five TTL inputs, CLK0–CLK4, and is software selectable. Additionally,
CLK1/CLK2 and CLK3/CLK4 can be selected as differential ECL clock sources. The video, shift clock, and
reference clock outputs provide a software-selected divide ratio of the chosen clock input. The reference
clock can optionally be provided as an output on CLK3, and a data latch clock can optionally be input on
CLK4.
The TVP3010 has three 256-by-8 color lookup tables with triple 8-bit video digital-to-analog converters
(DACs) capable of directly driving a doubly terminated 75-
line. The lookup tables are designed with a
dual-ported RAM architecture that enables ultra-high speed operation. Sync generation is incorporated on
the green output channel. Horizontal sync and vertical sync are fed through the device and optionally
inverted to indicate screen resolution to the monitor. A palette-page register is used to provide the additional
bits of palette address when 1, 2, or 4 bit planes are used. This allows the screen colors to be changed with
only one microprocessor interface unit (MPU) write cycle.
The device features a separate VGA bus that allows data from the feature connector of most VGA-supported
personal computers to be fed directly into the palette without the need for external data multiplexing. This
allows a replacement graphics board to remain downwards compatible by utilizing the existing graphics
circuitry often located on the motherboard.
The TVP3010 VIP is highly system integrated. It can be connected to the serial port of VRAM devices without
external buffer logic and connected to many graphics engines directly. The split shift-register transfer
function, which is supported by VRAM, is also supported by the TVP3010.
The system-integration concept is carried to manufacturing test and field diagnosis. To support these,
several highly integrated test functions have been designed to enable simplified testing of the palette, the
graphics board, and the graphics system.
The 32-bit TVP3010 is pin compatible with the TLC3407X VIP, allowing convenient performance upgrades
when using devices in the TI Video Interface Palette family.
NOTE:
The TVP3010 includes circuits that are patented and circuit designs that have
patents pending.
EPIC is a trademark of Texas Instruments Incorporated.
XGA is a registered trademark of IBM.
TARGA is a registered trademark of Truevision Incorporated.