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參數(shù)資料
| 型號(hào)： | TVP3030-220 |
| 廠商： | Texas Instruments, Inc. |
| 英文描述： | Video Interface PALETTE Exract(1600×1200，24位真彩色視頻接口調(diào)色器) |
| 中文描述： | 視頻接口調(diào)色板Exract（1600 × 1200,24位真彩色視頻接口調(diào)色器） |
| 文件頁(yè)數(shù)： | 15/107頁(yè) |
| 文件大?。?/td> | 689K |
| 代理商： | TVP3030-220 |
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1–9
1.5
Terminal Functions (Continued)
TERMINAL
I/O
DESCRIPTION
NAME
NO.
SYSHS,
SYSVS
121, 122
I
System horizontal and vertical sync inputs. These signals should be selected for
all modes other than VGA mode 2. These signals are pipeline delayed and each
may be inverted before being passed to the HSYNCOUT and VSYNCOUT
terminals. General control register bits GCR(1,0) control the polarity inversion.
If used to generate the sync level on the green current output, SYSHS and
SYSVS must be active low at the input to the TVP3030.
VGABL
126
I
VGA blank input. VGABL is active low. This should be selected when in VGA
mode 2 (CLK0 latching of VGA data and video controls). VGABL is pipeline
delayed before being passed to the DACs.
VGAHS,
VGAVS
124, 125
I
VGA horizontal and vertical sync inputs. These signals should be used when in
VGA mode 2 (CLK0 latching of VGA data and video controls). These signals are
pipeline delyed and each may be inverted before being passed to the
HSYNCOUT and VSYNCOUT terminals. General control regiser bits GCR(1,0)
control the polarity inversion. If used to generate the sync level on the green
current output, VGAHS and VGAVS must be active low at the input to the
TVP3030.
VGA7–VGA0
112–119
I
VGA port. This bus can be selected as the pixel input bus for VGA modes, but
it does not allow for any multiplexing.
WR
65
I
Write strobe input. A logic 0 on this terminal initiates a write to the register map.
Write transfer data is latched from the D(7–0) bus with the rising edge of WR.
XTAL1,
XTAL2
155, 156
I/O
Connection for quartz crystal resonator as a reference for the frequency
synthesis PLLs. XTAL2 may be used as a TTL reference clock input, in which
case XTAL1 is left unconnected.
NOTE: All unused inputs should be tied to a logic level and not be allowed to float.
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| TVP3030-250 | Video Interface PALETTE Exract(1600×1200，24位真彩色視頻接口調(diào)色器) |
| TVP3409-170 | Advanced Video Interface PALETTE(雙PLL，視頻接口調(diào)色器真彩色CMOS) |
| TVP3409-135 | Advanced Video Interface PALETTE(雙PLL，視頻接口調(diào)色器真彩色CMOS) |
| TVP3703-170 | Video Interface PALETTE Exract(雙PLL，先進(jìn)的視頻接口調(diào)色器) |
| TVP3703-135 | Video Interface PALETTE Exract(雙PLL，先進(jìn)的視頻接口調(diào)色器) |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| TVP3030-230PPA | 制造商:Rochester Electronics LLC 功能描述:- Bulk |
| TVP3030-250MEP | 制造商:Rochester Electronics LLC 功能描述:- Bulk |
| TVP3033 | 制造商:TI 制造商全稱:Texas Instruments 功能描述:Video Interface Palette |
| TVP3033-175 | 制造商:TI 制造商全稱:Texas Instruments 功能描述:Video Interface Palette |
| TVP3033-175PPA | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Video DAC with Color Palette (RAMDAC) |
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