參數(shù)資料
型號: V30MZ
英文描述: V30MZ(TM) Hardware (Preliminary) | User's Manual[01/2002]
中文描述: V30MZ(TM)硬件(初步)|用戶手冊[01/2002]
文件頁數(shù): 42/89頁
文件大小: 418K
代理商: V30MZ
CHAPTER 3 CPU FUNCTIONS
42
3.7 Addressing Mode
3.7.1 Instruction address
The instruction address refers to the address at which an operation code is read and, normally it is automatically
incremented every time an operation code is read. However, in an instruction that controls the instruction execution
sequence such as a jump instruction, subroutine call instruction, the branch destination instruction address is
specified by an operand.
(1) Direct addressing
The 4-byte data in an operation code becomes an instruction address and is loaded into the PS and PC
registers. This mode is used by the following instructions.
CALL far_proc
BR
far_label
(2) PC relative addressing
The 1-byte or 2-byte data in an operation code becomes a displacement from the start address (PC value) of the
next instruction and is added to the PC.
This mode is used by the following instructions.
CALL
BR
BR
Bcondition short_label ; Example BZ short_label
near_proc
near_label
short_label
BNC short_label
(3) Register indirect addressing
The content of any 16-bit register specified by the register specification field in an operation code becomes the
instruction address and is loaded into the PC.
This mode is used by the following instructions.
CALL regptr16
BR
regptr16
; Example CALL AW
; Example BR
IX
(4) Memory indirect addressing
The 2-byte or 4-byte data in memory specified by the memory addressing (refer to
Section
3.7.2 Data address
)
indicated by the addressing mode specification field in an operation code becomes the instruction address and is
directly loaded into the PC or both PS and PC.
This mode is used by the following instructions.
CALL memptr16
CALL memptr32
BR
memptr16
BR
memptr32 ; Example BR
; Example CALL word_var [BW]
; Example CALL dword_var [BW+IX]
; Example BR
word_var [BR+2]
dword_var [BP+IY]
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