參數(shù)資料
型號(hào): WEDPNF8M721V-XBX
英文描述: 8Mx72 Synchronous DRAM + 8Mb Flash Mixed Module(8Mx72同步動(dòng)態(tài)RAM+8M位閃速存儲(chǔ)器混合型模塊)
中文描述: 8Mx72同步DRAM 8MB閃存的混合模塊(8Mx72同步動(dòng)態(tài)RAM的800萬位閃速存儲(chǔ)器混合型模塊)
文件頁數(shù): 34/42頁
文件大小: 686K
代理商: WEDPNF8M721V-XBX
34
White Electronic Designs Corporation (602) 437-1520 www.whiteedc.com
WEDPNF8M721V-XBX
NOTES:
1.
2.
3.
4.
5.
FPA represents the address of the memory location to be programmed.
PD represents the data to be programmed at byte address.
FD
7
is the output of the complement of the data written to each chip.
FD
OUT
is the output of the data written to the device.
Figure indicates the last two bus cycles of a four bus cycle sequence.
A
F
F
F
F
F
D
A
P
P
t
W
t
W
P
D
7
D
O
t
A
t
C
t
C
t
D
t
D
D
t
A
t
G
A
t
W
FIG. 15
FLASH ALTERNATE FCS CONTROLLED
PROGRAMMING OPERATION TIMINGS
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