參數(shù)資料
型號(hào)： WEDPNF8M721V-XBX
英文描述： 8Mx72 Synchronous DRAM + 8Mb Flash Mixed Module(8Mx72同步動(dòng)態(tài)RAM+8M位閃速存儲(chǔ)器混合型模塊)
中文描述： 8Mx72同步DRAM 8MB閃存的混合模塊（8Mx72同步動(dòng)態(tài)RAM的800萬(wàn)位閃速存儲(chǔ)器混合型模塊）
文件頁(yè)數(shù)： 9/42頁(yè)
文件大小： 686K
代理商： WEDPNF8M721V-XBX
9
White Electronic Designs Corporation (602) 437-1520 www.whiteedc.com
WEDPNF8M721V-XBX
FIG. 3
MODE REGISTER DEFINITION
M3 = 0
1
2
4
8
Reserved
Reserved
Reserved
Full Page
M3 = 1
1
2
4
8
Reserved
Reserved
Reserved
Reserved
Operating Mode
Standard Operation
All other states reserved
0
-
0
-
Defined
-
0
1
Burst Type
Sequential
Interleaved
CAS Latency
Reserved
Reserved
2
3
Reserved
Reserved
Reserved
Reserved
Burst Length
M0
0
1
0
1
0
1
0
1
Burst Length
CAS Latency
BT
A
9
A
7
A
6
A
5
A
4
A
3
A
8
A
2
A
1
A
0
Mode Register (Mx)
Address Bus
M1
0
0
1
1
0
0
1
1
M2
0
0
0
0
1
1
1
1
M3
M4
0
1
0
1
0
1
0
1
M5
0
0
1
1
0
0
1
1
M6
0
0
0
0
1
1
1
1
M6-M0
M8
M7
Op Mode
A
10
A
11
Reserved*
WB
0
1
Write Burst Mode
Programmed Burst Length
Single Location Access
M9
*Should program
M11, M10 = 0, 0
to ensure compatibility
with future devices.
TABLE 1 - BURST DEFINITION
Burst
Length
Starting Column
Address
Order of Accesses Within a Burst
Type = Sequential
A0
0
1
A0
0
1
0
1
A0
0
1
0
1
0
1
0
1
2
0-1
1-0
0-1
1-0
A1
0
0
1
1
A1
0
0
1
1
0
0
1
1
0-1-2-3
1-2-3-0
2-3-0-1
3-0-1-2
0-1-2-3
1-0-3-2
2-3-0-1
3-2-1-0
4
A2
0
0
0
0
1
1
1
1
0-1-2-3-4-5-6-7
1-2-3-4-5-6-7-0
2-3-4-5-6-7-0-1
3-4-5-6-7-0-1-2
4-5-6-7-0-1-2-3
5-6-7-0-1-2-3-4
6-7-0-1-2-3-4-5
7-0-1-2-3-4-5-6
Cn, Cn + 1, Cn + 2
Cn + 3, Cn + 4...
…Cn - 1,
Cn…
0-1-2-3-4-5-6-7
1-0-3-2-5-4-7-6
2-3-0-1-6-7-4-5
3-2-1-0-7-6-5-4
4-5-6-7-0-1-2-3
5-4-7-6-1-0-3-2
6-7-4-5-2-3-0-1
7-6-5-4-3-2-1-0
8
Full
Page
(y)
n = A0-9/8/7
Not Supported
(location 0-y)
NOTES:
1.For full-page accesses: y = 512.
2.For a burst length of two, A
1-8
select the block-of-two burst; A0 selects
the starting column within the block.
3.For a burst length of four, A
2-8
select the block-of-four burst; A
0-1
select
the starting column within the block.
4.For a burst length of eight, A
3-8
select the block-of-eight burst; A
0-2
select the starting column within the block.
5.For a full-page burst, the full row is selected and A
0-8
select the starting
column.
6.Whenever a boundary of the block is reached within a given sequence
above, the following access wraps within the block.
7.For a burst length of one, A
0-8
select the unique column to be accessed,
and Mode Register bit M3 is ignored.
Type = Interleaved
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WEDPNF8M722V-1010BI 制造商:WEDC 制造商全稱:White Electronic Designs Corporation 功能描述:8Mx72 Synchronous DRAM + 16Mb Flash Mixed Module Multi-Chip Package
WEDPNF8M722V-1010BM 制造商:WEDC 制造商全稱:White Electronic Designs Corporation 功能描述:8Mx72 Synchronous DRAM + 16Mb Flash Mixed Module Multi-Chip Package
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