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White Electronic Designs Corporation (602) 437-1520 www.whiteedc.com
WEDPNF8M721V-XBX
DC ELECTRICAL CHARACTERISTICS AND OPERATING CONDITIONS
(Notes 1, 3)
(V
CC
= +3.3V
±
0.3V; T
A
= -55
°
C to +125
°
C)
Parameter/Condition
Symbol
Units
Min
3
Max
3.6
Supply Voltage
Input High Voltage: Logic 1; All inputs (4)
Input Low Voltage: Logic 0; All inputs (4)
SDRAM
Input Leakage Current: Any input 0V
≤
V
IN
≤
V
CC
(All other pins not under test = 0V)
SDRAM Input Leakage Address Current
(All other pins not under test = 0V)
SDRAM Output Leakage Current: I/Os are disabled; 0V
≤
V
OUT
≤
V
CC
SDRAM Output High Voltage (I
OUT
= -4mA)
SDRAM Output Low Voltage (I
OUT
= 4mA)
Flash
Flash Input Leakage Current (V
CC
= 3.6, V
IN
= GND or V
CC)
Flash Output Leakage Current (V
CC
= 3.6, V
IN
= GND or V
CC)
V
CC
V
IH
V
IL
V
V
V
0.7 x Vcc
-0.3
V
CC
+ 0.3
0.8
I
I
-5
5
μ
A
I
I
-25
-5
2.4
–
25
5
–
0.4
μ
A
μ
A
V
V
I
OZ
V
OH
V
OL
I
LI
10
10
μ
A
μ
A
I
LOx8
Flash Output High Voltage (I
OH
= -2.0 mA, V
CC
= 3.0)
V
OH1
0.85
X
V
CC
V
Flash Output Low Voltage (I
OL
= 5.8 mA, V
CC
= 3.0)
V
O
L
0.45
V
Flash Low V
CC
Lock-Out Voltage (5)
V
LKO
2.3
2.5
V
NOTES:
1. All voltages referenced to V
SS
.
2. This parameter is not tested but guaranteed by design. f = 1 MHz, T
A
= 25
°
C.
3. An initial pause of 100ms is required after power-up, followed by two AUTO REFRESH commands, before proper device operation is ensured. (V
CC
must
be powered up simultaneously.) The two AUTO REFRESH command wake-ups should be repeated any time the t
REF
refresh requirement is exceeded.
4. V
IH
overshoot: V
IH
(MAX) = V
CC
+ 2V for a pulse width
≤
3ns, and the pulse width cannot be greater than one third of the cycle rate. V
IL
undershoot: V
IL
(MIN) = -2V for a pulse width
≤
3ns.
5. Guaranteed by design, but not tested.
ABSOLUTE MAXIMUM RATINGS
Parameter
Supply Voltage Range (V
CC
)
Signal Voltage Range
Operating Temperature T
A
(Mil)
Operating Temperature T
A
(Ind)
Storage Temperature, Plastic
Power Dissipation
Flash Endurance (write/erase cycles)
Unit
V
V
°
C
°
C
°
C
W
cycles
-0.5 to +4.0
-0.5 to Vcc +0.5
-55 to +125
-40 to +85
-65 to +150
5
1,000,000 min.
NOTE:
Stress greater than those listed under "Absolute Maximum Ratings" may cause
permanent damage to the device. This is a stress rating only and functional opera-
tion of the device at these or any other conditions greater than those indicated in
the operational sections of this specification is not implied. Exposure to absolute
maximum rating conditions for extended periods may affect reliability.
SDRAM CAPACITANCE
(Note 2)
Parameter
Input Capacitance: CLK
Addresses, BA
0-1
Input Capacitance
Input Capacitance: All other input-only pins
Input/Output Capacitance: I/Os
Symbol
C
I1
C
A
C
I2
C
IO
Max
10
35
10
12
Unit
pF
pF
pF
pF
FLASH DATA RETENTION
Parameter
Minimum Pattern Data
Retention Time
Test Conditions
150
°
C
125
°
C
Min
10
20
Unit
Years
Years