參數(shù)資料
型號(hào): XC2S200E-6FGG456C
廠商: Xilinx Inc
文件頁數(shù): 50/108頁
文件大?。?/td> 0K
描述: IC SPARTAN-IIE FPGA 200K 456FBGA
標(biāo)準(zhǔn)包裝: 60
系列: Spartan®-IIE
LAB/CLB數(shù): 1176
邏輯元件/單元數(shù): 5292
RAM 位總計(jì): 57344
輸入/輸出數(shù): 289
門數(shù): 200000
電源電壓: 1.71 V ~ 1.89 V
安裝類型: 表面貼裝
工作溫度: 0°C ~ 85°C
封裝/外殼: 456-BBGA
供應(yīng)商設(shè)備封裝: 456-FBGA
其它名稱: 122-1323
46
DS077-3 (v3.0) August 9, 2013
Product Specification
Spartan-IIE FPGA Family: DC and Switching Characteristics
R
— OBSOLETE — OBSOLETE — OBSOLETE — OBSOLETE —
CLB Arithmetic Switching Characteristics
Setup times not listed explicitly can be approximated by decreasing the combinatorial delays by the setup time adjustment
listed. Precise values are provided by the timing analyzer.
Symbol
Description
Speed Grade
Units
-7
-6
Min
Max
Min
Max
Combinatorial Delays
TOPX
F operand inputs to X via XOR
-
0.8
-
0.8
ns
TOPXB
F operand input to XB output
-
0.8
-
0.9
ns
TOPY
F operand input to Y via XOR
-
1.4
-
1.5
ns
TOPYB
F operand input to YB output
-
1.1
-
1.3
ns
TOPCYF
F operand input to COUT output
-
0.9
-
1.0
ns
TOPGY
G operand inputs to Y via XOR
-
0.8
-
0.9
ns
TOPGYB
G operand input to YB output
-
1.2
-
1.3
ns
TOPCYG
G operand input to COUT output
-
0.9
-
1.0
ns
TBXCY
BX initialization input to COUT
-
0.51
-
0.6
ns
TCINX
CIN input to X output via XOR
-
0.6
-
0.7
ns
TCINXB
CIN input to XB
-
0.07
-
0.1
ns
TCINY
CIN input to Y via XOR
-
0.7
-
0.7
ns
TCINYB
CIN input to YB
-
0.4
-
0.5
ns
TBYP
CIN input to COUT output
-
0.14
-
0.15
ns
Multiplier Operation
TFANDXB
F1/2 operand inputs to XB output via AND
-
0.35
-
0.4
ns
TFANDYB
F1/2 operand inputs to YB output via AND
-
0.7
-
0.8
ns
TFANDCY
F1/2 operand inputs to COUT output via AND
-
0.5
-
0.6
ns
TGANDYB
G1/2 operand inputs to YB output via AND
-
0.6
-
0.7
ns
TGANDCY
G1/2 operand inputs to COUT output via AND
-
0.3
-
0.4
ns
Setup/Hold Times with Respect to Clock CLK
TCCKX / TCKCX
CIN input to FFX
1.2 / 0
-
1.3 / 0
-
ns
TCCKY / TCKCY
CIN input to FFY
1.2 / 0
-
1.3 / 0
-
ns
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