參數(shù)資料
型號: XC2S200E-6FGG456C
廠商: Xilinx Inc
文件頁數(shù): 89/108頁
文件大小: 0K
描述: IC SPARTAN-IIE FPGA 200K 456FBGA
標準包裝: 60
系列: Spartan®-IIE
LAB/CLB數(shù): 1176
邏輯元件/單元數(shù): 5292
RAM 位總計: 57344
輸入/輸出數(shù): 289
門數(shù): 200000
電源電壓: 1.71 V ~ 1.89 V
安裝類型: 表面貼裝
工作溫度: 0°C ~ 85°C
封裝/外殼: 456-BBGA
供應商設備封裝: 456-FBGA
其它名稱: 122-1323
DS077-4 (v3.0) August 9, 2013
81
Product Specification
Spartan-IIE FPGA Family: Pinout Tables
R
— OBSOLETE — OBSOLETE — OBSOLETE — OBSOLETE —
I/O, L#N
3
V19
XC2S150E,
200E, 300E,
400E
-
I/O,
L54N_Y
I/O,
L58N_Y
I/O,
L58N_Y
I/O,
L58N_Y
I/O, L58N
I/O, L#P
3
V20
XC2S150E,
200E, 300E,
400E
-
I/O
I/O, L54P_Y I/O, L58P_Y I/O, L58P_Y I/O, L58P_Y
I/O, L58P
I/O, L#N
3
V22
XC2S100E,
200E, 300E,
600E
XC2S200E,
300E,
400E, 600E
I/O,
L40N_Y
I/O, L53N
I/O, VREF
Bank 3,
L57N_Y
I/O, VREF
Bank 3,
L57N_Y
I/O, VREF
Bank 3,
L57N
I/O, VREF
Bank 3,
L57N_Y
I/O, L#P
3
U22
XC2S100E,
200E, 300E,
600E
-
I/O, L40P_Y
I/O, L53P
I/O, L57P_Y I/O, L57P_Y
I/O, L57P
I/O, L57P_Y
I/O
3
U21
-
I/O
3
U20
-
I/O
I/O, L#N
3
U18
XC2S100E,
200E, 300E,
600E
-
I/O,
L39N_Y
I/O, L52N
I/O,
L56N_Y
I/O,
L56N_Y
I/O, L56N
I/O,
L56N_Y
I/O, L#P
3
U19
XC2S100E,
200E, 300E,
600E
-
I/O, L39P_Y
I/O, L52P
I/O, L56P_Y I/O, L56P_Y
I/O, L56P
I/O, L56P_Y
I/O, VREF
Bank 3,
L#N
3
T21
XC2S150E,
200E, 300E,
400E, 600E
All
I/O, VREF
Bank 3,
L38N
I/O, VREF
Bank 3,
L51N_Y
I/O, VREF
Bank 3,
L55N_Y
I/O, VREF
Bank 3,
L55N_Y
I/O, VREF
Bank 3,
L55N_Y
I/O, VREF
Bank 3,
L55N_Y
I/O, L#P
3
T22
XC2S150E,
200E, 300E,
400E, 600E
-
I/O, L38P
I/O, L51P_Y I/O, L55P_Y I/O, L55P_Y I/O, L55P_Y I/O, L55P_Y
I/O
3
T20
-
I/O
I/O, L#N
3
T18
XC2S150E,
200E, 300E,
400E
-
I/O,
L50N_Y
I/O,
L54N_Y
I/O,
L54N_Y
I/O,
L54N_Y
I/O, L54N
I/O, L#P
3
T19
XC2S150E,
200E, 300E,
400E
-
I/O
I/O, L50P_Y I/O, L54P_Y I/O, L54P_Y I/O, L54P_Y
I/O, L54P
I/O, L#N
3
R21
XC2S100E,
150E, 300E,
600E
XC2S600E
I/O,
L37N_Y
I/O,
L49N_Y
I/O, L53N
I/O,
L53N_Y
I/O, L53N
I/O, VREF
Bank 3,
L53N_Y
I/O, L#P
3
R22
XC2S100E,
150E, 300E,
600E
-
I/O, L37P_Y I/O, L49P_Y
I/O, L53P
I/O, L53P_Y
I/O, L53P
I/O, L53P_Y
I/O
3
R20
-
I/O
I/O, VREF
Bank 3,
L#N
3
R18
XC2S300E,
400E, 600E
All
I/O, VREF
Bank 3,
L36N
I/O, VREF
Bank 3,
L48N
I/O, VREF
Bank 3,
L52N
I/O, VREF
Bank 3,
L52N_Y
I/O, VREF
Bank 3,
L52N_Y
I/O, VREF
Bank 3,
L52N_Y
I/O (D6),
L#P
3
R19
XC2S300E,
400E, 600E
-
I/O (D6),
L36P
I/O (D6),
L48P
I/O (D6),
L52P
I/O (D6),
L52P_Y
I/O (D6),
L52P_Y
I/O (D6),
L52P_Y
I/O (D5),
L#N_YY
3
P22
All
-
I/O (D5),
L35N_YY
I/O (D5),
L47N_YY
I/O (D5),
L51N_YY
I/O (D5),
L51N_YY
I/O (D5)
L51N_YY
I/O (D5),
L51N_YY
I/O,
L#P_YY
3
P21
All
-
I/O,
L35P_YY
I/O,
L47P_YY
I/O,
L51P_YY
I/O,
L51P_YY
I/O,
L51P_YY
I/O,
L51P_YY
FG456 Pinouts (XC2S100E, XC2S150E, XC2S200E, XC2S300E, XC2S400E, XC2S600E)
Pad Name
Pin
LVDS
Async.
Output
Option
VREF
Option
Device-Specific Pinouts: XC2S
Function
Bank
100E
150E
200E
300E
400E
600E
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