參數(shù)資料
型號(hào): XC2S200E-6FGG456C
廠商: Xilinx Inc
文件頁(yè)數(shù): 70/108頁(yè)
文件大?。?/td> 0K
描述: IC SPARTAN-IIE FPGA 200K 456FBGA
標(biāo)準(zhǔn)包裝: 60
系列: Spartan®-IIE
LAB/CLB數(shù): 1176
邏輯元件/單元數(shù): 5292
RAM 位總計(jì): 57344
輸入/輸出數(shù): 289
門(mén)數(shù): 200000
電源電壓: 1.71 V ~ 1.89 V
安裝類(lèi)型: 表面貼裝
工作溫度: 0°C ~ 85°C
封裝/外殼: 456-BBGA
供應(yīng)商設(shè)備封裝: 456-FBGA
其它名稱(chēng): 122-1323
64
DS077-4 (v3.0) August 9, 2013
Product Specification
Spartan-IIE FPGA Family: Pinout Tables
R
— OBSOLETE — OBSOLETE — OBSOLETE — OBSOLETE —
I/O
2
P134
-
I/O (D3),
L17N
2
P135
XC2S50E,
300E
-
I/O, VREF
Bank 2,
L17P
2
P136
XC2S50E,
300E
All
GND
-
P137
-
I/O,
L16N_YY
2
P138
All
-
I/O,
L16P_YY
2
P139
All
-
I/O,
L15N_YY
2
P140
All
-
I/O (D2),
L15P_YY
2
P141
All
-
VCCINT
-
P142
-
VCCO
-
P143
-
GND
-
P144
-
I/O (D1),
L14N
2
P145
XC2S50E,
300E
-
I/O, L14P
2
P146
XC2S50E,
300E
XC2S100E,
150E, 200E,
300E
I/O
2
P147
-
I/O
2
P148
-
I/O
2
P149
-
I/O, VREF
Bank 2,
L13N
2
P150
XC2S100E,
150E
All
I/O, L13P
2
P151
XC2S100E,
150E
-
I/O
2
P152
-
XC2S200E,
300E
I/O (DIN,
D0),
L12N_YY
2
P153
All
-
I/O (DOUT,
BUSY),
L12P_YY
2
P154
All
-
CCLK
2
P155
-
PQ208 Pinouts (XC2S50E, XC2S100E,
XC2S150E, XC2S200E, XC2S300E)
Pad Name
Pin
LVDS
Async.
Output
Option
VREF
Option
Function
Bank
VCCO
-
P156
-
TDO
2
P157
-
GND
-
P158
-
TDI
-
P159
-
I/O (CS),
L11P_YY
1
P160
All
-
I/O
(WRITE),
L11N_YY
1
P161
All
-
I/O
1
P162
-
XC2S200E,
300E
I/O
1
P163
-
I/O, VREF
Bank 1,
L10P_YY
1
P164
All
I/O,
L10N_YY
1
P165
All
-
I/O
1
P166
-
I/O
1
P167
-
I/O, L9P
1
P168
XC2S50E,
100E, 200E,
300E
XC2S100E,
150E, 200E,
300E
I/O, L9N
1
P169
XC2S50E,
100E, 200E,
300E
-
GND
-
P170
-
VCCO
-
P171
-
VCCINT
-
P172
-
I/O, L8P
1
P173
XC2S50E,
100E, 200E,
300E
-
I/O, L8N
1
P174
XC2S50E,
100E, 200E,
300E
-
I/O, L7P
1
P175
XC2S50E,
200E, 300E
-
I/O, L7N
1
P176
XC2S50E,
200E, 300E
-
GND
-
P177
-
PQ208 Pinouts (XC2S50E, XC2S100E,
XC2S150E, XC2S200E, XC2S300E)
Pad Name
Pin
LVDS
Async.
Output
Option
VREF
Option
Function
Bank
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