參數(shù)資料
型號: XRM48L950PGET
廠商: Texas Instruments
文件頁數(shù): 134/176頁
文件大?。?/td> 0K
描述: MCU 16/32Bit FLASH 3MB 144LQFP
標(biāo)準(zhǔn)包裝: 1
系列: Hercules™ ARM® RM4x
應(yīng)用: 工業(yè)安全,醫(yī)療
核心處理器: ARM? Cortex? - R4F
程序存儲器類型: 閃存(3MB)
控制器系列: RM4
RAM 容量: 256K x 8
接口: CAN,以太網(wǎng),I²C,LIN,MibSPI,SCI,SPI,USB
輸入/輸出數(shù): 64
電源電壓: 1.14 V ~ 3.6 V
工作溫度: -40°C ~ 105°C
安裝類型: 表面貼裝
封裝/外殼: 144-LQFP
包裝: 托盤
供應(yīng)商設(shè)備封裝: 144-LQFP(20x20)
其它名稱: 296-29389
North
Flip West
F
SPNS174A – APRIL 2012 – REVISED SEPTEMBER 2013
4.5
ARM
Cortex-R4F CPU Information
4.5.1
Summary of ARM Cortex-R4F CPU Features
The features of the ARM Cortex-R4F CPU include:
An integer unit with integral EmbeddedICE-RT logic.
High-speed Advanced Microprocessor Bus Architecture (AMBA) Advanced eXtensible Interfaces (AXI)
for Level two (L2) master and slave interfaces.
Floating Point Coprocessor
Dynamic branch prediction with a global history buffer, and a 4-entry return stack
Low interrupt latency.
Non-maskable interrupt.
A Harvard Level one (L1) memory system with:
Tightly-Coupled Memory (TCM) interfaces with support for error correction or parity checking
memories
ARMv7-R architecture Memory Protection Unit (MPU) with 12 regions
Dual core logic for fault detection in safety-critical applications.
An L2 memory interface:
Single 64-bit master AXI interface
64-bit slave AXI interface to TCM RAM blocks
A debug interface to a CoreSight Debug Access Port (DAP).
A trace interface to a CoreSight ETM-R4.
A Performance Monitoring Unit (PMU).
A Vectored Interrupt Controller (VIC) port.
For more information on the ARM Cortex-R4F CPU please see www.arm.com.
4.5.2
ARM Cortex-R4F CPU Features Enabled by Software
The following CPU features are disabled on reset and must be enabled by the application if required.
ECC On Tightly-Coupled Memory (TCM) Accesses
Harware Vectored Interrupt (VIC) Port
Floating Point Coprocessor
Memory Protection Unit (MPU)
4.5.3
Dual Core Implementation
The device has two Cortex-R4F cores, where the output signals of both CPUs are compared in the CCM-
R4 unit. To avoid common mode impacts the signals of the CPUs to be compared are delayed by 2 clock
cycles as shown in Figure 4-3.
The CPUs have a diverse CPU placement given by following requirements:
different orientation; e.g. CPU1 = "north" orientation, CPU2 = "flip west" orientation
dedicated guard ring for each CPU
Figure 4-2. Dual - CPU Orientation
60
System Information and Electrical Specifications
Copyright 2012–2013, Texas Instruments Incorporated
Product Folder Links: RM48L950 RM48L750 RM48L550
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XRM48L952PGET 功能描述:ARM微控制器 - MCU 16/32B RISC Fl. MCU RoHS:否 制造商:STMicroelectronics 核心:ARM Cortex M4F 處理器系列:STM32F373xx 數(shù)據(jù)總線寬度:32 bit 最大時(shí)鐘頻率:72 MHz 程序存儲器大小:256 KB 數(shù)據(jù) RAM 大小:32 KB 片上 ADC:Yes 工作電源電壓:1.65 V to 3.6 V, 2 V to 3.6 V, 2.2 V to 3.6 V 工作溫度范圍:- 40 C to + 85 C 封裝 / 箱體:LQFP-48 安裝風(fēng)格:SMD/SMT
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