參數(shù)資料
型號: XRM48L950PGET
廠商: Texas Instruments
文件頁數(shù): 68/176頁
文件大?。?/td> 0K
描述: MCU 16/32Bit FLASH 3MB 144LQFP
標準包裝: 1
系列: Hercules™ ARM® RM4x
應(yīng)用: 工業(yè)安全,醫(yī)療
核心處理器: ARM? Cortex? - R4F
程序存儲器類型: 閃存(3MB)
控制器系列: RM4
RAM 容量: 256K x 8
接口: CAN,以太網(wǎng),I²C,LIN,MibSPI,SCI,SPI,USB
輸入/輸出數(shù): 64
電源電壓: 1.14 V ~ 3.6 V
工作溫度: -40°C ~ 105°C
安裝類型: 表面貼裝
封裝/外殼: 144-LQFP
包裝: 托盤
供應(yīng)商設(shè)備封裝: 144-LQFP(20x20)
其它名稱: 296-29389
SPNS174A – APRIL 2012 – REVISED SEPTEMBER 2013
2.3.1.9
Multi-Buffered Serial Peripheral Interface Modules (MibSPI)
Table 2-9. PGE Multi-Buffered Serial Peripheral Interface Modules (MibSPI)
Terminal
Signal
Default
Pull Type
Description
Type
Pull State
Signal Name
144
PGE
MIBSPI1CLK
95
I/O
Pull Up
Programmable,
MibSPI1 clock, or GPIO
20uA
MIBSPI1NCS[0]/MIBSPI1SOMI[1]/MII_TXD[2]/
105
MibSPI1 chip select, or
USB1.RCV
GPIO
MIBSPI1NCS[1]/N2HET1[17]/MII_COL
130
/USB1.SUSPEND
MIBSPI1NCS[2]/N2HET1[19]/MDIO
40
N2HET1[15]/MIBSPI1NCS[4]
41
Pull Down
Programmable,
MibSPI1 chip select, or
20uA
GPIO
N2HET1[24]/MIBSPI1NCS[5]/MII_RXD[0]/RMII_RXD[0]
91
MIBSPI1NENA/N2HET1[23]/MII_RXD[2]/
96
Pull Up
Programmable,
MibSPI1 enable, or GPIO
USB1.VP
20uA
MIBSPI1SIMO[0]
93
MibSPI1 slave-in master-
out, or GPIO
N2HET1[8]/MIBSPI1SIMO[1]/MII_TXD[3]/
106
Pull Down
Programmable,
MibSPI1 slave-in master-
USB1.OverCurrent
20uA
out, or GPIO
MIBSPI1SOMI[0]
94
Pull Up
Programmable,
MibSPI1 slave-out master-
20uA
in, or GPIO
MIBSPI1NCS[0]/MIBSPI1SOMI[1]/MII_TXD[2]/
105
USB1.RCV
MIBSPI3CLK
53
I/O
Pull Up
Programmable,
MibSPI3 clock, or GPIO
20uA
MIBSPI3NCS[0]/AD2EVT/GIOB[2]/N2HET2_PIN_nDIS
55
MibSPI3 chip select, or
GPIO
MIBSPI3NCS[1]/N2HET1[25]/MDCLK
37
MIBSPI3NCS[2]/I2C_SDA/N2HET1[27]
4
MIBSPI3NCS[3]/I2C_SCL/N2HET1[29]
3
N2HET1[11]/MIBSPI3NCS[4]/N2HET2[18]/
6
Pull Down
Programmable,
MibSPI3 chip select, or
USB2.OverCurrent/USB_FUNC.VBUSI
20uA
GPIO
MIBSPI3NENA /MIBSPI3NCS[5]/N2HET1[31]
54
Pull Up
Programmable,
MibSPI3 chip select, or
20uA
GPIO
MIBSPI3NENA/MIBSPI3NCS[5]/N2HET1[31]
54
MibSPI3 enable, or GPIO
MIBSPI3SIMO[0]
52
MibSPI3 slave-in master-
out, or GPIO
MIBSPI3SOMI[0]
51
MibSPI3 slave-out master-
in, or GPIO
MIBSPI5CLK/MII_TXEN/RMII_TXEN
100
I/O
Pull Up
Programmable,
MibSPI5 clock, or GPIO
20uA
MIBSPI5NCS[0]
32
MibSPI5 chip select, or
GPIO
MIBSPI5NENA/MII_RXD[3]/USB1.VM
97
MibSPI5 enable, or GPIO
MIBSPI5SIMO[0]/MII_TXD[1]/RMII_TXD[1]
99
MibSPI5 slave-in master-
out, or GPIO
MIBSPI5SOMI[0]/MII_TXD[0]/RMII_TXD[0]
98
MibSPI5 slave-out master-
in, or GPIO
2.3.1.10 Ethernet Controller
Table 2-10. PGE Ethernet Controller: MDIO Interface
Terminal
Signal
Default
Pull Type
Description
Type
Pull State
Signal Name
144
PGE
MIBSPI3NCS[1]/N2HET1[25]/MDCLK
37
Output
Pull Up
Programmable,
Serial clock output
20uA
16
Device Package and Terminal Functions
Copyright 2012–2013, Texas Instruments Incorporated
Product Folder Links: RM48L950 RM48L750 RM48L550
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