參數(shù)資料
型號: XRT86VL34IB
廠商: EXAR CORP
元件分類: 數(shù)字傳輸電路
英文描述: Ultraframer DS3/E3/DS2/E2/DS1/E1/DS0
中文描述: DATACOM, FRAMER, PBGA225
封裝: 19 X 19 MM, 1 MM PITCH, PLASTIC, BGA-225
文件頁數(shù): 75/156頁
文件大?。?/td> 816K
代理商: XRT86VL34IB
XRT86VL34
70
REV. V1.2.0
QUAD T1/E1/J1 FRAMER/LIU COMBO - T1 REGISTER DESCRIPTION
T
ABLE
52: T
RANSMIT
S
IGNALING
C
R
EGISTER
0-23 (TSCR 0-23) H
EX
A
DDRESS
: 0
X
n340
TO
0
XN
357
B
IT
F
UNCTION
T
YPE
D
EFAULT
D
ESCRIPTION
-O
PERATION
7
A (x)
R/W
See Note
Transmit Signaling bit A
This bit allows user to provide signaling Bit A (Octets 0-23) if
Robbed-bit signaling is enabled (Rob_Enb bit of this register set to
1) and if signalling data is inserted from TSCR (TxSIGSRC[1:0] =
01 in this register).
N
OTE
:
Register 0xn340 represents signaling data for Time Slot 0,
and 0xn357 represents signaling data for Time Slot 23.
6
B (y)
R/W
See Note
Transmit Signaling bit B
This bit allows user to provide signaling Bit B (Octets 0-23) if
Robbed-bit signaling is enabled (Rob_Enb bit of this register set to
1) and if signalling data is inserted from TSCR (TxSIGSRC[1:0] =
01 in this register).
N
OTE
:
Register 0xn340 represents signaling data for Time Slot 0,
and 0xn357 represents signaling data for Time Slot 23.
5
C (x)
R/W
See Note
Transmit Signaling bit C
This bit allows user to provide signaling Bit C (Octets 0-23) if
Robbed-bit signaling is enabled (Rob_Enb bit of this register set to
1) and if signalling data is inserted from TSCR (TxSIGSRC[1:0] =
01 in this register).
N
OTE
:
Register 0xn340 represents signaling data for Time Slot 0,
and 0xn357 represents signaling data for Time Slot 23.
4
D (x)
R/W
See Note
Transmit Signaling bit D
This bit allows user to provide signaling Bit D (Octets 0-23) if
Robbed-bit signaling is enabled (Rob_Enb bit of this register set to
1) and if signalling data is inserted from TSCR (TxSIGSRC[1:0] =
01 in this register).
N
OTE
:
Register 0xn340 represents signaling data for Time Slot 0,
and 0xn357 represents signaling data for Time Slot 23.
3
Reserved
-
See Note
Reserved
2
Rob_Enb
R/W
See Note
Robbed-bit signaling enable
This bit enables or disables Robbed-bit signaling transmission. If
robbed-bit signaling is enabled, signaling data is conveyed in the
8th position of each signaling channel by replacing the original LSB
of the voice channel with signaling data.
0 = Disables Robbed-bit signaling.
1 = Enables Robbed-bit signaling.
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