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參數(shù)資料
| 型號： | XRT91L82IB |
| 廠商： | EXAR CORP |
| 元件分類： | 數(shù)字傳輸電路 |
| 英文描述： | 2.488/2.666 GBPS STS-48/STM-16 SONET/SDH TRANSCEIVER |
| 中文描述： | TRANSCEIVER, PBGA196 |
| 封裝： | 15 X 15 MM, STBGA-196 |
| 文件頁數(shù)： | 20/59頁 |
| 文件大?。?/td> | 414K |
| 代理商： | XRT91L82IB |
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XRT91L82
2.488/2.666 GBPS STS-48/STM-16 SONET/SDH TRANSCEIVER
PRELIMINARY
xr
REV. P1.0.5
17
T
ABLE
2: A
LTERNATE
R
EFERENCE
F
REQUENCY
O
PTIONS
(N
ORMAL
M
ODE
/ FEC
RATE
)
1.4
Due to different operating modes and data logic paths through the device, there is an associated latency from
data ingress to data egress. Table 3 specifies the data latency for a typical path.
T
ABLE
3: D
ATA
INGRESS
TO
DATA
EGRESS
LATENCY
Data Latency
1.5
Forward Error Correction is used to control errors along a one-way path of communication. FEC sends extra
information along with data which can be used by a receiver to check and correct the data without requesting
re-transmission of the original information. It does so by introducing a known structure into a data sequence
prior to transmission. The most common methods are to replace a 14-bit data packet with a 15-bit codeword
structure, or to replace a 17-bit data packet with an 18-bit codeword structure. The XRT91L82 supports FEC
by accepting a clock input reference frequency of 83.31 or 166.63 MHz. Both reference frequencies allows the
transmit 16-bit parallel data input to be applied to the STS-48 transceiver at 166.63 Mbps which is converted to
a 2.666 Gbps serial output stream to an optical module. A simplified block diagram of FEC is shown in
Figure 3.
Forward Error Correction (FEC)
1.6
The XRT91L82 contains an on-chip Pseudo Random Binary Sequence (PRBS) generator and detector for
diagnostic purpose. With the PRBS_EN asserted, the transmitter will send out PRBS pattern of 2
23
-1 in STS-
48/48c or STM-16 rate. At the same time, the receiver PRBS detector is also enabled. Whenever the PRBS
detector is not in sync, the PRBS_ERR bit will be set to “1”. To clear the erred condition, PRBSCLR must be
toggled "Low." If the correct PRBS pattern is detected by the receiver, then PRBS_ERR pin will go “Low” to
indicate PRBS synchronization has been achieved, otherwise PRBS_ERR will remain "1." PRBSCLR shares
pin F11 with RLOOPS. Serial Remote Line Loopback (RLOOPS) is disabled when PRBS_EN is enabled.
PRBS Pattern Generator and Analyzer
REFREQSEL
[1:0]
CMU R
EFERENCE
C
LOCK
F
REQUENCY
CDR R
EFERENCE
C
LOCK
F
REQUENCY
REF1CLK
C
LOCK
F
REQUENCY
REF2CLK
C
LOCK
F
REQUENCY
T
RANSMIT
D
ATA
R
ATE
R
ECEIVE
D
ATA
R
ATE
00
REF1CLK
REF1CLK
77.76 MHz
non-FEC
not used
2.488 Gbps
non-FEC
2.488 Gbps
non-FEC
01
REF1CLK
REF2CLK
77.76 MHz
non-FEC
83.31 MHz
FEC
2.488 Gbps
non-FEC
2.666 Gbps
FEC
10
REF2CLK
REF1CLK
77.76 MHz
non-FEC
83.31 MHz
FEC
2.666 Gbps
FEC
2.488 Gbps
non-FEC
11
REF2CLK
REF2CLK
not used
83.31 MHz
FEC
2.666 Gbps
FEC
2.666 Gbps
FEC
M
ODE
O
F
O
PERATION
D
ATA
P
ATH
C
LOCK
R
EFERENCE
M
AXIMUM
REFNCLK C
LOCK
C
YCLES
Thru-mode
Data on TXDI[15:0]P/N to data on TXOP/N
REF1CLKP/N or
REF2CLKP/N Clock
18 to 20
F
IGURE
3. S
IMPLIFIED
B
LOCK
D
IAGRAM
OF
F
ORWARD
E
RROR
C
ORRECTION
STS-48
Transceiver
SONET/Framer
ASIC
SONET/Framer
ASIC
F
F
STS-48
Transceiver
Optical
Module
Optical
Module
Optical Fiber
16
16
16
16
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
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| XRT91L82IB-F | 功能描述:總線收發(fā)器 Transceiver RoHS:否 制造商:Fairchild Semiconductor 邏輯類型:CMOS 邏輯系列:74VCX 每芯片的通道數(shù)量:16 輸入電平:CMOS 輸出電平:CMOS 輸出類型:3-State 高電平輸出電流:- 24 mA 低電平輸出電流:24 mA 傳播延遲時間:6.2 ns 電源電壓-最大:2.7 V, 3.6 V 電源電壓-最小:1.65 V, 2.3 V 最大工作溫度:+ 85 C 封裝 / 箱體:TSSOP-48 封裝:Reel |
| XRT94L31 | 制造商:EXAR 制造商全稱:EXAR 功能描述:3-CHANNEL DS3/E3/STS-1 TO STS-3/STM-1 MAPPER IC |
| XRT94L31_07 | 制造商:EXAR 制造商全稱:EXAR 功能描述:3-CHANNEL DS3/E3/STS-1 TO STS-3/STM-1 MAPPER IC |
| XRT94L31ES-L04 | 功能描述:時鐘合成器/抖動清除器 RoHS:否 制造商:Skyworks Solutions, Inc. 輸出端數(shù)量: 輸出電平: 最大輸出頻率: 輸入電平: 最大輸入頻率:6.1 GHz 電源電壓-最大:3.3 V 電源電壓-最小:2.7 V 封裝 / 箱體:TSSOP-28 封裝:Reel |
| XRT94L31IB | 功能描述:網(wǎng)絡(luò)控制器與處理器 IC Demapper RoHS:否 制造商:Micrel 產(chǎn)品:Controller Area Network (CAN) 收發(fā)器數(shù)量: 數(shù)據(jù)速率: 電源電流（最大值）:595 mA 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:PBGA-400 封裝:Tray |
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