參數(shù)資料
型號： ZL50018GAC
廠商： ZARLINK SEMICONDUCTOR INC
元件分類： 路由/交換
英文描述： 2 K Digital Switch with Enhanced Stratum 3 DPLL
中文描述： TELECOM, DIGITAL TIME SWITCH, PBGA256
封裝： 17 X 17 MM, 1.61 MM HEIGHT, PLASTIC, MS-034, BGA-256
文件頁數(shù)： 100/136頁
文件大?。?/td> 1448K
代理商： ZL50018GAC
ZL50018
Data Sheet
100
Zarlink Semiconductor Inc.
24.0 Memory
24.1 Memory Address Mappings
When A13 is high, the data or connection memory can be accessed by the microprocessor port. Bit 1 - 0 in the
Control Register determine the access to the data or connection memory (CM_L or CM_H).
MSB
(Note 1)
Stream Address
(St0 - 31)
Channel Address
(Ch0 - 255)
A13
A12
A11
A10
A9
A8
Stream [n]
A7
A6
A5
A4
A3
A2
A1
A0
Channel [n]
1
1
1
1
1
1
1
1
1
.
.
.
.
.
1
1
.
.
.
.
.
.
1
1
0
0
0
0
0
0
0
0
0
.
.
.
.
.
0
0
.
.
.
.
.
.
1
1
0
0
0
0
0
0
0
0
1
.
.
.
.
.
1
1
.
.
.
.
.
.
1
1
0
0
0
0
1
1
1
1
0
.
.
.
.
.
1
1
.
.
.
.
.
.
1
1
0
0
1
1
0
0
1
1
0
.
.
.
.
.
1
1
.
.
.
.
.
.
1
1
0
1
0
1
0
1
0
1
0
.
.
.
.
.
0
1
.
.
.
.
.
.
0
1
Stream 0
Stream 1
Stream 2
Stream 3
Stream 4
Stream 5
Stream 6
Stream 7
Stream 8
.
.
.
.
.
Stream 14
Stream 15
.
.
.
.
.
.
Stream 30
Stream 31
0
0
.
.
0
0
0
0
.
.
0
0
.
.
.
.
0
0
.
.
.
.
1
1
0
0
.
.
0
0
0
0
.
.
0
0
.
.
.
.
1
1
.
.
.
.
1
1
0
0
.
.
0
0
1
1
.
.
1
1
.
.
.
.
1
1
.
.
.
.
1
1
0
0
.
.
1
1
0
0
1
1
.
.
.
.
1
1
.
.
.
.
1
1
0
0
.
.
1
1
0
0
.
.
1
1
.
.
.
.
1
1
.
.
.
.
1
1
0
0
.
.
1
1
0
0
.
1
1
.
.
.
.
1
1
.
.
.
.
1
1
0
0
.
.
1
1
0
0
1
1
.
.
.
.
1
1
.
.
.
.
1
1
0
1
.
.
0
1
0
1
.
.
0
1
.
.
.
.
0
1
.
.
.
.
0
1
Ch 0
Ch 1
.
.
Ch 30
Ch 31 (Note 2)
Ch 32
Ch 33
.
.
Ch 62
Ch 63 (Note 3)
.
.
.
.
Ch126
Ch 127 (Note 4)
.
.
.
.
Ch 254
Ch 255 (Note 5)
Note 1:
A13 must be high for access to data and connection memory positions. A13 must be low to access internal
registers.
Note 2:
Channels 0 to 31 are used when serial stream is at 2.048 Mbps.
Note 3:
Channels 0 to 63 are used when serial stream is at 4.096 Mbps.
Note 4:
Channels 0 to 127 are used when serial stream is at 8.192 Mbps.
Note 5:
Channels 0 to 255 are used when serial stream is at 16.384 Mbps.
Table 68 - Address Map for Memory Locations (A13 = 1)
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