參數(shù)資料
型號(hào): ZL50018GAC
廠商: ZARLINK SEMICONDUCTOR INC
元件分類: 路由/交換
英文描述: 2 K Digital Switch with Enhanced Stratum 3 DPLL
中文描述: TELECOM, DIGITAL TIME SWITCH, PBGA256
封裝: 17 X 17 MM, 1.61 MM HEIGHT, PLASTIC, MS-034, BGA-256
文件頁數(shù): 49/136頁
文件大?。?/td> 1448K
代理商: ZL50018GAC
ZL50018
Data Sheet
49
Zarlink Semiconductor Inc.
BER Receiver Error Register (
BRER
) - This read-only register contains the number of counted errors. When
the error count reaches 0xFFFF, the BER counter will stop updating so that it will not overflow. ST[n]CBER
(bit 1) in the BER Receiver Control Register is used to reset the BRER register.
For normal BER operation, CMM (bit 0) must be 1 in the Connection Memory Low (CM_L). PCC1 - 0 (bits 2 - 1) in
the Connection Memory Low must be programmed to “10” to enable the per-stream based BER transmitters. For
each stream, the length (or total number of channels) of BER testing can be as long as one whole frame, but the
channels MUST be consecutive. Upon completion of programming the connection memory, the corresponding BER
receiver can be started by setting ST[n]SBER (bit 0) in the BRCR to high. There must be at least 2 frames (250
μ
s)
between completion of connection memory programming and starting the BER receiver before the BER receiver
can correctly identify BER errors. A 16 bit BER counter is used to count the number of bit errors.
19.0 PCM A-law/
μ
-law Translation
The ZL50018 provides per-channel code translation to be used to adapt pulse code modulation (PCM) voice or
data traffic between networks which use different encoding laws. Code translation is valid in both Connection Mode
and Message Mode.
In order to use this feature, the Connection Memory High (CM_H) entry for the output channel must be
programmed. V/D (bit 4) defines if the traffic in the channel is voice or data. Setting ICL1 - 0 (bits 3 - 2) programs the
input coding law and OCL1 - 0 (bits 1- 0) programs the output coding law as shown in Table 14.
The different code options are:
For voice coding options, the ITU-T G.711 A-law and ITU-T G.711
μ
-law are the standard rules for encoding. A-law
without Alternate Bit Inversion (ABI) is an alternative code that does not invert the even bits (6, 4, 2, 0).
μ
-law
without Magnitude Inversion (MI) is an alternative code that does not perform inversion of magnitude bits (6, 5, 4, 3,
2, 1, 0).
When transferring data code, the option “no code” does not invert the bits. The Alternate Bit Inversion (ABI) option
inverts the even bits (6, 4, 2, 0) while the Inverted Alternate Bit Inversion (ABI) inverts the odd bits (7, 5, 3, 1). When
the “All bits inverted” option is selected, all of the bits (7, 6, 5, 4, 3, 2, 1, 0) are inverted.
The input channel and output channel encoding law are configured independently. If the output channel coding is
set to be different from the input channel, the ZL50018 performs translation between the two standards. If the input
and output encoding laws are set to the same standard, no translation occurs. As the V/D (bit 4) of the Connection
Memory High (CM_H) must be set on a per-channel basis, it is not possible to translate between voice and data
encoding laws.
Input Coding
(ICL1- 0)
Output Coding
(OCL1 - 0)
Voice Coding
(V/D bit = 0)
Data Coding
(V/D bit = 1)
00
00
ITU-T G.711 A-law
No code
01
01
ITU-T G.711
μ
-law
Alternate Bit Inversion (ABI)
10
10
A-law without Alternate Bit
Inversion (ABI)
Inverted Alternate Bit
Inversion (ABI)
11
11
μ
-law without Magnitude
Inversion (MI)
All bits inverted
Table 14 - Input and Output Voice and Data Coding
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