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參數(shù)資料
| 型號(hào)： | ZL50031 |
| 廠商： | Zarlink Semiconductor Inc. |
| 英文描述： | Flexible 4 K x 2 K Channel Digital Switch with H.110 Interface and 2 K x 2 K Local Switch |
| 中文描述： | 靈活的為4 K × 2鉀通道數(shù)字交換機(jī)的H.110接口和2度x 2度本地交換 |
| 文件頁(yè)數(shù)： | 16/74頁(yè) |
| 文件大?。?/td> | 765K |
| 代理商： | ZL50031 |
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ZL50031
Data Sheet
16
Zarlink Semiconductor Inc.
8.0 Memory Block Programming
The ZL50031 block programming mode (BPM) register provides users with the capability of initializing the local and
backplane connection memories in two frames. Bit 13 - bit 15 of every backplane connection memory location will
be programmed with the pattern stored in bit 6 - bit 8 of the BPM register. Bit 13 - bit 15 of every local connection
memory location will be programmed with the pattern stored in bits 3 to 5 of the BPM register. The other bit
positions of the backplane connection memory and the local connection memory are loaded with zeros. See Figure
4 on page 16 for the connection memory contents when the device is in block programming mode.
The block programming mode is enabled by setting the memory block program (MBP) bit of the Control Register to
high. After the block programming enable (BPE) bit of the BPM register is set to high, the block programming data
will be loaded into bits 13 to 15 of every backplane connection memory location and bits 13 to 15 of every local
connection memory low location. The other connection memory bits are loaded with zeros. When the memory block
programming is completed, the device resets the BPE bit to low. See Table 10 on page 37 for the bit assignment of
the BPM register.
Figure 4 - Block Programming Data in the Connection Memories
9.0 Delay Through the ZL50031
The switching of information from the input serial streams to the output serial streams results in a throughput delay.
The device can be programmed to perform time slot interchange functions with different throughput delay
capabilities on a per-channel basis. For voice applications it is recommended to select variable throughput delay to
ensure minimum delay between input and output data. In wideband data applications it is recommended to select
constant throughput delay to maintain the frame integrity of the information through the switch.
The delay through the device varies according to the type of throughput delay selected in the BTM2 - BTM0 bits of
the backplane connection memory or LTM0 - LTM2 bits of the local connection memory as described in Table 24 on
page 51 and Table 27 on page 53, respectively.
9.1 Variable Delay Mode
The delay in this mode is dependent only on the combination of source and destination channels and is
independent of input and output streams. The minimum delays achievable in the ZL50031 device are 3-channel
delay, 5-channel delay, and 10-channel delay for the 2 Mbps, 4 Mbps, and 8 Mbps data rates respectively. The
maximum delay is one frame plus 3 channels, one frame plus 5 channels, and one frame plus 10 channels for the
2 Mbps, 4 Mbps and 8 Mbps modes respectively.
For the backplane interface, the variable delay mode can be programmed through the backplane connection
memory bits, BTM2 - BTM0. When BTM2 - BTM0 are programmed to “000”, it is a per-channel variable delay from
local input to the backplane output. When BTM2 - BTM0 are set to “010”, it is a per-channel variable delay from
backplane input to backplane output.
7
6
5
4
3
2
1
0
8
9
10
11
12
13
0
14
15
BBPD1
0
0
0
0
0
0
0
0
0
0
BBPD0 0
0
Backplane Connection Memory (BCM)
7
6
5
4
3
2
1
0
8
9
10
11
12
13
0
14
15
0
0
0
0
0
0
0
0
0
0
0
LBPD1 LBPD0 0
Local Connection Memory (LCM)
LBPD2
BBPD2
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| ZL50031QEG1 | 制造商:Microsemi Corporation 功能描述:FLEXIBLE 4 K X 2 K CH DGTL SWIT W/ H.110 INTRFC AND 1 K X 1 - Trays 制造商:MICROSEMI CONSUMER MEDICAL PRODUCT GROUP 功能描述:IC DGTL SWITCH 4K X 2K 256MQFP 制造商:Microsemi Corporation 功能描述:IC DGTL SWITCH 4K X 2K 256MQFP |
| ZL50050 | 制造商:ZARLINK 制造商全稱:Zarlink Semiconductor Inc 功能描述:8 K-Channel Digital Switch with High Jitter Tolerance, Per Stream Rate Conversion (2, 4, 8, 16, or 32 Mbps), and 32 Inputs and 32 Outputs |
| ZL50050GAC | 制造商:Microsemi Corporation 功能描述:8K DX HI JIT TOL, RATE CONV & 32 I/O - Trays |
| ZL50050GAG2 | 制造商:Microsemi Corporation 功能描述:SWIT FABRIC 8KX8K/4K X 4K 1.8V/3.3V 196BGA - Trays 制造商:Microsemi Corporation 功能描述:8K DX HI JIT TOL RATE CONV & 32 I/O 制造商:Microsemi 功能描述:SWIT FABRIC 8KX8K/4K X 4K 1.8V/3.3V 196BGA |
| ZL50051 | 制造商:ZARLINK 制造商全稱:Zarlink Semiconductor Inc 功能描述:8 K Channel Digital Switch with High Jitter Tolerance, Single Rate (8 or 16 Mbps), and 64 Inputs and 64 Outputs |
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