參數(shù)資料
型號(hào)： 28F1604C3
廠商： Intel Corp.
英文描述： 3 Volt Advanced+ Stacked Chip Scale Package Memory(3V閃速存儲(chǔ)器和靜態(tài)存儲(chǔ)器)
中文描述： 3伏高級(jí)堆疊芯片級(jí)封裝存儲(chǔ)器（3V的閃速存儲(chǔ)器和靜態(tài)存儲(chǔ)器）
文件頁(yè)數(shù)： 30/64頁(yè)
文件大?。?/td> 927K
代理商： 28F1604C3
28F1602C3, 28F1604C3, 28F3204C3
24
Preliminary
4.6
Flash AC Characteristics—Write Operations
NOTES:
1. Write timing characteristics during erase suspend are the same as during write-only operations.
2. Refer to
Table 5, “Flash Memory Command Definitions” on page 11
for valid A
IN
or D
IN
.
3. Sampled, but not 100% tested.
4. Write pulse width (t
) is defined from F-CE# or F-WE# going low (whichever goes low last)
to F-CE# or
F-WE# going high (whichever goes high first). Hence, t
= t
= t
= t
= t
. Similarly, write
pulse width high (t
) is defined from F-CE# or F-WE# going high (whichever goes high first)
to F-CE# or
F-WE# going low (whichever goes low first). Hence, t
= t
WHWL
= t
EHEL
= t
WHEL
= t
EHWL
.
5. See
Figure 4, “Input/Output Reference Waveform” on page 22
allowable input slew rate.
6. See
Figure 7, “AC Waveform: Flash Program and Erase Operations” on page 26
.
#
Sym
Parameter
Density
16 Mbit
32 Mbit
Unit
Product
-90
-110
-100
-110
Voltage Range
2.7 V – 3.3 V
Note
Min
Max
Min
Max
W1
t
PHWL
/
t
PHEL
F-RP# High Recovery to F-WE# (F-CE#) Going Low
150
150
150
150
ns
W2
t
ELWL
t
WLEL
F-CE# (F-WE#) Setup to F-WE# (F-CE#) Going Low
0
0
0
0
ns
W3
t
ELEH
t
WLWH
F-WE# (F-CE#) Pulse Width
4
60
70
70
70
ns
W4
t
DVWH
t
DVEH
Data Setup to F-WE# (F-CE#) Going High
2
50
60
60
60
ns
W5
t
AVWH
t
AVEH
Address Setup to F-WE# (F-CE#) Going High
2
60
70
70
70
ns
W6
t
WHEH
t
EHWH
F-CE# (F-WE#) Hold Time from F-WE# (F-CE#) High
0
0
0
0
ns
W7
t
WHDX
t
EHDX
Data Hold Time from F-WE# (F-CE#) High
2
0
0
0
0
ns
W8
t
WHAX
t
EHAX
Address Hold Time from F-WE# (F-CE#) High
2
0
0
0
0
ns
W9
t
WHWL
t
EHEL
F-WE# (F-CE#) Pulse Width High
4
30
30
30
30
ns
W10
t
VPWH
t
VPEH
F-V
PP
Setup to F-WE# (F-CE#) Going High
3
200
200
200
200
ns
W11
t
QVVL
F-V
PP
Hold from Valid SRD
3
0
0
0
0
ns
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