參數(shù)資料
型號： 29PL256N
廠商： Spansion Inc.
英文描述： 256/128/128 Mb (16/8/8 M x 16-Bit) CMOS, 3.0 Volt-only Simultaneous Read/Write, Page-Mode Flash Memory
中文描述： 256/128/128字節(jié)（16/8/8 M中的x 16位），3.0伏的CMOS只同步讀/寫，頁模式閃存
文件頁數(shù)： 53/74頁
文件大小： 1968K
代理商： 29PL256N
June 6, 2007 S29PL-N_00_A5
S29PL-N MirrorBit
Flash Family
53
D a t a
S h e e t
( P r e l i m i n a r y )
Software Functions and Sample Code
The following are C functions and source code examples of using the Secured Silicon Sector Entry, Program,
and exit commands. Refer to the
Spansion Low Level Driver User Guide
(available soon on
www.spansion.com
) for general information on Spansion Flash memory software development guidelines.
Note
Base = Base Address.
/* Example: SecSi Sector Entry Command */
*((UINT16 *)base_addr + 0x555) = 0x00AA; /* write unlock cycle 1 */
*((UINT16 *)base_addr + 0x2AA) = 0x0055; /* write unlock cycle 2 */
*((UINT16 *)base_addr + 0x555) = 0x0088; /* write Secsi Sector Entry Cmd */
Note
Base = Base Address.
/* Once in the SecSi Sector mode, you program */
/* words using the programming algorithm. */
Note
Base = Base Address.
/* Example: SecSi Sector Exit Command */
*((UINT16 *)base_addr + 0x555) = 0x00AA; /* write unlock cycle 1 */
*((UINT16 *)base_addr + 0x2AA) = 0x0055; /* write unlock cycle 2 */
*((UINT16 *)base_addr + 0x555) = 0x0090; /* write SecSi Sector Exit cycle 3 */
*((UINT16 *)base_addr + 0x000) = 0x0000; /* write SecSi Sector Exit cycle 4 */
Table 10.2
Secured Silicon Sector Entry
(LLD Function = lld_SecSiSectorEntryCmd)
Cycle
Operation
Word Address
Data
Unlock Cycle 1
Write
Base + 555h
00AAh
Unlock Cycle 2
Write
Base + 2AAh
0055h
Entry Cycle
Write
Base + 555h
0088h
Table 10.3
Secured Silicon Sector Program
(LLD Function = lld_ProgramCmd)
Cycle
Operation
Word Address
Data
Unlock Cycle 1
Write
Base + 555h
00AAh
Unlock Cycle 2
Write
Base + 2AAh
0055h
Program Setup
Write
Base + 555h
00A0h
Program
Write
Word Address
Data Word
Table 10.4
Secured Silicon Sector Exit
(LLD Function = lld_SecSiSectorExitCmd)
Cycle
Operation
Word Address
Data
Unlock Cycle 1
Write
Base + 555h
00AAh
Unlock Cycle 2
Write
Base + 2AAh
0055h
Exit Cycle
Write
Base + 555h
0090h
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