參數(shù)資料
型號(hào): 29PL256N
廠商: Spansion Inc.
英文描述: 256/128/128 Mb (16/8/8 M x 16-Bit) CMOS, 3.0 Volt-only Simultaneous Read/Write, Page-Mode Flash Memory
中文描述: 256/128/128字節(jié)(16/8/8 M中的x 16位),3.0伏的CMOS只同步讀/寫,頁(yè)模式閃存
文件頁(yè)數(shù): 73/74頁(yè)
文件大?。?/td> 1968K
代理商: 29PL256N
June 6, 2007 S29PL-N_00_A5
S29PL-N MirrorBit
Flash Family
73
D a t a
S h e e t
( P r e l i m i n a r y )
14. Revision History
Section
Description
Revision A0 (February 28, 2005)
Initial release
Revision A1 (August 8, 2005)
Performance Characteristics
Updated Package Options
MCP Look-Ahead Connection Diagram
Corrected pinout
Memory Map
Added Sector and Memory Address Map for S29PL127N
Device Operation Table
Added Dual Chip Enable Device Operation Table
V
CC
Power Up
Updated t
VCS
.
Added V
CC
ramp rate restriction
Updated typical and maximum values.
DC Characteristics
Revision A2 (October 25, 2005)
Ordering Information
Updated table
Connection Diagram and Package
Dimensions - S29PL-N Fortified BGA
Added pinout and package dimensions.
Global
Changed data sheet status from Advance Information to Preliminary.
Removed Byte Address Information
Distinctive and Performance
Characteristics
Removed Enhanced VersatileI/O, updated read access times, and Package options.
Logic Symbol and Block Diagram
Removed V
IO
from Logic Symbol and Block Diagram.
Updated table
Erase and Programming Performance
Write Buffer Programming
Updated Write Buffer Abort Description.
Operating Ranges
Updated V
IO
supply voltages.
Updated I
CC1
, I
CC4
, I
CC6
.
DC characteristics
Revision A3 (November 14, 2005)
Ordering Information
Updated table
Valid Combinations Table
Updated table
Revision A4 (November 23, 2005)
Logic Symbols
Removed V
IO
from the illustrations
Removed V
IO
from the illustration
Modified Fortified BGA Pinout (LAA064)
Block Diagram
Connection Diagrams
PL129N Sector and Memory Address
Map
Updated Address Ranges for Banks 2A and 2B
Revision A5 (June 6, 2007)
Global
Removed LAA064 package offering and all relevant ordering information
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