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參數(shù)資料
| 型號(hào)： | 29PL256N |
| 廠商： | Spansion Inc. |
| 英文描述： | 256/128/128 Mb (16/8/8 M x 16-Bit) CMOS, 3.0 Volt-only Simultaneous Read/Write, Page-Mode Flash Memory |
| 中文描述： | 256/128/128字節(jié)（16/8/8 M中的x 16位），3.0伏的CMOS只同步讀/寫，頁(yè)模式閃存 |
| 文件頁(yè)數(shù)： | 72/74頁(yè) |
| 文件大?。?/td> | 1968K |
| 代理商： | 29PL256N |
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72
S29PL-N MirrorBit
Flash Family
S29PL-N_00_A5 June 6, 2007
D a t a
S h e e t
( P r e l i m i n a r y )
Table 13.4
Primary Vendor-Specific Extended Query
Addresses
Data
Description
40h
41h
42h
0050h
0052h
0049h
Query-unique ASCII string
PRI
43h
0031h
Major version number, ASCII (reflects modifications to the silicon)
44h
0034h
Minor version number, ASCII (reflects modifications to the CFI table)
45h
0010h
Address Sensitive Unlock (Bits 1 – 0)
0 = Required, 1 = Not Required
Silicon Technology (Bits 5 – 2) 0100 = 0.11 μm
46h
0002h
Erase Suspend
0 = Not Supported, 1 = To Read Only, 2 = To Read & Write
47h
0001h
Sector Protect
0 = Not Supported, X = Number of sectors in per group
48h
0000h
Sector Temporary Unprotect
00 = Not Supported, 01 = Supported
49h
0008h (PL-N)
Sector Protect/Unprotect scheme
01 =29F040 mode, 02 = 29F016 mode, 03 = 29F400 mode,
04 = 29LV800 mode 07 = New Sector Protect mode,
08 = Advanced Sector Protection
4Ah
0073h (PL256N)
003Bh (PL127N)
003Bh (PL129N)
Simultaneous Operation
00 = Not Supported, X = Number of Sectors except Bank A
4Bh
0000h
Burst Mode Type
00 = Not Supported, 01 = Supported
4Ch
0002h (PL-N)
Page Mode Type
00 = Not Supported, 01 = 4 Word Page, 02 = 8 Word Page
4Dh
0085h
ACC (Acceleration) Supply Minimum
00h = Not Supported, D7 – D4: Volt, D3 – D0: 100 mV
4Eh
0095h
ACC (Acceleration) Supply Maximum
00h = Not Supported, D7 – D4: Volt, D3 – D0: 100 mV
4Fh
0001h
Top/Bottom Boot Sector Flag
00h = No Boot, 01h = Dual Boot Device, 02h = Bottom Boot Device, 03h = Top Boot
Device
50h
0001h
Program Suspend
0 = Not supported, 1 = Supported
51h
0001h
Unlock Bypass
00 = Not Supported, 01=Supported
52h
0007h
Secured Silicon Sector (Customer OTP Area) Size 2
N
bytes
53h
000Fh
Hardware Reset Low Time-out during an embedded algorithm to read mode Maximum 2
N
ns
54h
000Eh
Hardware Reset Low Time-out not during an embedded algorithm to read mode
Maximum 2
N
ns
55h
0005h
Erase Suspend Time-out Maximum 2
N
μs
56h
0005h
Program Suspend Time-out Maximum 2
N
μs
57h
0004h
Bank Organization
00 = Data at 4Ah is zero, X = Number of Banks
58h
0013h (PL256N)
000Bh (PL127N)
000Bh (PL129N)
Bank A Region Information. X = Number of sectors in bank
59h
0030h (PL256N)
0018h (PL127N)
0018h (PL129N)
Bank 1 Region Information. X = Number of sectors in bank
5Ah
0030h (PL256N)
0018h (PL127N)
0018h (PL129N)
Bank 2 Region Information. X = Number of sectors in bank
5Bh
0013h (PL256N)
000Bh (PL127N)
000Bh (PL129N)
Bank 3 Region Information. X = Number of sectors in bank
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