參數(shù)資料
型號(hào): 73M2921-IG
廠商: Electronic Theatre Controls, Inc.
英文描述: Advanced Single Chip Modem
中文描述: 先進(jìn)的單芯片調(diào)制解調(diào)器
文件頁(yè)數(shù): 10/41頁(yè)
文件大小: 222K
代理商: 73M2921-IG
73M2921
Advanced Single
Chip Modem
Page 10 of 41
TDK Semiconductor
February 99 Rev M
MCLK
[2:0]
0 0 0
0 0 1
0 1 0
0 1 1
1 0 0
1 0 1
1 1 0
1 1 1
Divisor
MICCLK Output
12
6
3
1.5
8
4
2
1
1.536
3.072
6.144
12.288
2.304
4.608
9.216
18.432
Table 4
- μP clock (MHz) vs. Divisor
USING THE MAILBOX REGISTER
1
The mailbox function uses the same data interface as when accessing CR0 but has a different physical
addresses (UA1:0 = 10b, 11b). The Mailbox is configured as two 8-bit bytes which are separated into a Control
byte at address 10b and the Data byte at address 11b.
The
8,17
interrupt is closely coupled to the use of the Mailbox. An interrupt from
8,17
(DSP to microcontroller
interrupt) indicates that the host controller should read the mailbox. This interrupt can be the result of the host
accessing the Mailbox or an “unsolicited interrupt” indicating there has been a change in one of the status
registers. The
μ
C reads the MSB first, then the LSB. Reading the LSB sets
8,17
high and clears the 73M2921
internal mail full flag bit, allowing the 73M2921 to write new data to the mailbox. Mailbox data is not explicitly
formatted. The microcontroller and 73M2921 firmware define the control exchange format.
(2) CONFIGURATION REGISTER ACCESS (CRA)
The configuration registers, CR1 and CR2 control some of the basic operating conditions. Some of the bits in
these registers are for factory use only and should only be set to zero. Others, as noted, must be set to one for
normal operation. Descriptions of CR1 and CR2 follow the programming section.
For Configuration Register Access, the Mailbox Control byte must be set up as follows:
Mailbox Control Byte for Configuration Register Access
D7
RES
0
Res = Reserved for DSP use.
WT/BT = Word Transfer/Byte Transfer.
Should be 1 (word transfer) for CRA.
R/
:
= Read/Write. Read = 1, Write = 0
D6
D5
R/
:
1/0
D4
D3
D2
D1
D0
WT/
%7
1
1
0
0
0
1
For Configuration Register Access, the Mailbox Data byte specifies CR1 or CR2 as follows:
Mailbox Data Byte for CR1 Access
5HDGLQJDQGZULWLQJWKURXJKWKH0DLOER[5HJLVWHUVKRXOGEHOLPLWHGWRRQFHSHUPLOOLVHFRQGZKLOHLQLGOHPRGHDQGRQFHSHUWHQ
PLOOLVHFRQGVRWKHUZLVH
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