參數(shù)資料
型號: 73M2921-IG
廠商: Electronic Theatre Controls, Inc.
英文描述: Advanced Single Chip Modem
中文描述: 先進(jìn)的單芯片調(diào)制解調(diào)器
文件頁數(shù): 6/41頁
文件大?。?/td> 222K
代理商: 73M2921-IG
73M2921
Advanced Single
Chip Modem
Page 6 of 41
TDK Semiconductor
February 99 Rev M
POWER CONTROL
The power control circuit determines the state of the 73M2921 when powered down, and the means for waking
up the chip. The function is related to the chip and DSP reset functions and is controlled by various input pins
and register bits. The chip pins are
5,1*
'7,
, and RESET. The CR0 register bits that control power circuit
function are RSTCHIP, RSTDSPB, ENOSC, ENDSPCK, ENMCLK, and PSDIS (1:0).
POWER CONTROL CIRCUIT FUNCTION
Power consumption can be reduced by turning off or slowing down specific circuit functions in register CR0.
EN DSP=0: stops DSP clock.
EN MCLK=0: turns off uC clock. MCLK=000: state gives lowest
μ
C clock frequency.
The 73M2921 has a power-down mode. Access to this mode is described below.
Power Down Mode:
To achieve power down first set RSTDSP to 0 in CR0 (bit 0). Second, set ENDSPCK,
ENMCLK, and ENOSC to 0 in CR0 (bits 12, 8, and 7 respectively). Writing a one to ENDSPCK, ENMCLK, and
ENOSC will bring the 73M2921 back to its previous power mode.
Powering up:
Toggling the RESET pin,
'7,
, or
5,1*
will power the 73M2921 up to Normal mode. Similar
results can be achieved by writing to the reset pin in CR0 (00b, bit 3).
The following is a functionality chart for the power control circuitry. It shows all inputs and describes the effect
on various 73M2921 functions.
EN OSC=0: turns off oscillator and analog bias currents.
DSPCK=000: state gives lowest DSP clock frequency.
INPUT
PIN
5,1*
(Pin 24)
'7,
(Pin 26)
CR0 bits
ENDSPCK
(CR0 D12)
ENOSC
(CR0 D7)
PSDIS1
(CR0 D2)
PSDIS0
(CR0 D1)
AFFECTED SIGNAL OR FUNCTION
These are the two pins used to bring the chip out of a power
down state. Their function can be masked by the PSDIS bits
in register CR0.
Either of these bits in CR0 set to ONE inhibits the generation of a pulse that
will reset the DSP.
Masks
'7,
input when set.
Masks
5,1*
when set.
Table 4 - Power Control Functions
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