參數(shù)資料
型號(hào): 73M2921-IG
廠(chǎng)商: Electronic Theatre Controls, Inc.
英文描述: Advanced Single Chip Modem
中文描述: 先進(jìn)的單芯片調(diào)制解調(diào)器
文件頁(yè)數(shù): 11/41頁(yè)
文件大小: 222K
代理商: 73M2921-IG
73M2921
Advanced Single
Chip Modem
February 99 Rev M
TDK Semiconductor
Page 11 of 41
D7
1
D6
0
D5
1
D4
1
D3
0
D2
0
D1
0
D0
0
Mailbox Data Byte for CR2 Access
D7
1
D6
1
D5
0
D4
1
D3
0
D2
0
D1
0
D0
0
Reading and writing to the Configuration registers is a four step process for the host processor.
(1) The host processor writes to the Mailbox Control byte:
(a) When writing data to the configuration registers the control byte 051h should be written to UA address
10b.
(b) When reading data from the configuration registers the control byte 071h should be written to UA address
10b.
(2) The Host writes to the Mailbox Data byte (at UA address 11b, write either B0h to access CR1 or D0h to
access CR2). Order is important as the writing of the Data byte triggers an internal interrupt in the DSP
indicating that new mail is present. The 73M2921 will respond through the mailbox. The contents of the
response are not important to the host.
(3) The host reads/writes the high byte of CR1/CR2 at UA address 10b.
(4) The host reads/writes the low byte of CR1/CR2 at UA address 11b.
FIGURE 2: Interface Bus Activity for Configuration Register Access
MS Byte
LS Byte
MS Byte
DSP Use
LS Byte
UD[0-7]
UA1:0
10
11
11
XX
XX
10
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