參數(shù)資料
型號(hào): 73M2921-IG
廠商: Electronic Theatre Controls, Inc.
英文描述: Advanced Single Chip Modem
中文描述: 先進(jìn)的單芯片調(diào)制解調(diào)器
文件頁數(shù): 13/41頁
文件大?。?/td> 222K
代理商: 73M2921-IG
73M2921
Advanced Single
Chip Modem
February 99 Rev M
TDK Semiconductor
Page 13 of 41
REGISTER NAME:
CR1 controls Diagnostic modes, data wait, 5V power supply detect, speaker volume, ADC/DAC sampling rate,
slave sync, digital loopback, digital interface loopback, enable digital interface, and enable timer. It also has bits
that are reserved for test modes.
CR1 Configuration Register 1
ADDRESS: 05H (101b)
D15
D14
D13
D12
D11
D10
D9
D8
D7
D6
D5
D4
D3
D2
D1
D0
EN
TIMER
TEST
3
TEST
2
EN
DIGI
TDK
TDK
0
0
SLAVE
SYNC
16
KHZ
SPKR VOL
(1:0)
0
5V
DETECT
DATA
WAIT
DIAG
MODE
BIT NO.
D0
NAME
Diagnostic
Mode
(Test Mode)
Data Wait
(Test Mode)
5V Detect
(output)
CONDITION
Always 0
DESCRIPTION
DIAGNOSTIC MODE: Must be zero.
D1
Always 0
Must be zero.
D2
This is a logical 1 if the power supply to the 73M2921 is in the
5V range. Note, this signal is valid only when EN ANALOG
(CR2: D10) is enabled.
Not Used.
High Volume
Medium Volume
Low Volume
Speaker off
The ADC/DAC sampling rates are 16.0KHz
D3
D4,D5
0
Speaker
Volume (1:0)
2
1
1
0
0
1
0
1
0
1
D6
16KHz
0
The ADC/DAC sampling rates are 14.4KHZ (Default)
1
The phase error register measures the time between the rising
edge of RXC and the rising edge of TXC
D7
Slave Sync
(modem test
mode)
0
The phase error register measures the time between the rising
edge of EXC and the rising edge of TXC
D8,D9
D10
D11
D12
0
Not Used
TDK proprietary.
TDK proprietary.
Enables the digital serial interface. Pins TXCLK, RXCLK, TXD,
and RXD are enabled. Must be set to one for normal operation.
Tri-states pins TXCLK and RXCLK (with a weak pull-down to 0).
RXD pin is driven to a 1, TXD is disabled at the input pin, and
the timer baud clocks are forced low.
Must be zero.
Must be zero.
When set to 1, sample, bit, and clocks for transmit and receive
are running. Baud (provided that EN DIGI is true).
TDK
TDK
Always 0
Always 0
1
Enable Digital
Interface
0
D13
D14
D15
Test 2
Test 3
0
0
1
Enable Timer
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