參數(shù)資料
型號(hào): 73M2921-IG
廠商: Electronic Theatre Controls, Inc.
英文描述: Advanced Single Chip Modem
中文描述: 先進(jìn)的單芯片調(diào)制解調(diào)器
文件頁(yè)數(shù): 5/41頁(yè)
文件大?。?/td> 222K
代理商: 73M2921-IG
73M2921
Advanced Single
Chip Modem
February 99 Rev M
TDK Semiconductor
Page 5 of 41
PIN DESCRIPTION
(continued)
SERIAL DATA INTERFACE
NAME
RXCLK
PIN
45
TYPE
O
DESCRIPTION
RECEIVE CLOCK: Receive clock for the serial data interface. Data is
transferred from the 73M2921 on the rising edge of the clocks.
TRANSMIT CLOCK: Transmit clock for the serial data interface. Data is
transferred to the 73M2921 on the rising edge of the clocks.
RECEIVE DATA: Receive Digital Data.
TRANSMIT DATA: Transmit Digital Data.
TXCLK
42
O
RXD
TXD
44
41
O
I
AUXILIARY FUNCTIONS
NAME
MON
PIN
38
TYPE
O
DESCRIPTION
MONITOR: Speaker driver. PCM output under software control. See
app note concerning the use of this pin.
EXTERNAL PROGRAM ENABLE: This pin must be tied low for normal
operation.
PEXT
50
I
ANALOG I/O
NAME
INPA,
INNA
OUTPA,
OUTNA
PIN
34,
35
31,
30
TYPE
I
DESCRIPTION
ANALOG INPUT: Differential analog input to a high resolution ADC.
O
ANALOG OUTPUT: Differential analog output from a high resolution
DAC.
HARDWARE REQUIREMENTS
The 73M2921 chip is designed for a single +3.3 or 5 Volt supply and for minimum power consumption
(~100mW @ 3.3V). It supports power down (idle) mode via microcontroller software control. It will also accept
a request for power down from the DTE via hardware control. The device operates from internal ROM/RAM,
but may be configured for external ROM operation and external RAM access (for custom applications) using
either the prototype or the production packages.
LINE/HYBRID INTERFACE
The 73M2921 chip provides a differential analog input and output. This interface will drive a standard Data
Access Arrangement (DAA). The system controller provides additional control such as hook, phone and
auxiliary relay, parallel pickup and in-use detect, and ring detect.
The Internal DAC provides a differential output signal with a maximum output swing of 1.2Vpp, capable of
driving a 50K
load. One output can be used alone for a single ended output (with possible performance
degradation).
The internal ADC has a differential input maximum of 1.2Vpp, and provides a biasing resistor to Vref for AC
coupling. One input can be driven while leaving the other floating for a single ended input (with possible
performance degradation). The signal passes through a passive anti-aliasing filter.
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