
IDT System Integrity Functions
Watchdog Timer
79RC32438 User Reference Manual
4 - 6
November 4, 2002
Notes
If the watchdog timer is enabled to generate an NMI interrupt (i.e., the WNE bit is set) and the timer
expires, the watchdog timer time-out (WTO) bit in the ERRCS register is set, the EN bit in the WTC register
is cleared, and an NMI is generated.
Note:
Until the WTO bit is cleared by software, another watchdog NMI interrupt cannot be
generated.
If the watchdog timer is configured to generate a warm reset (i.e., the WRE bit is set) and the timer
expires, the TO bit in the WTC register and the WTO bit in the ERRCS register are set, the EN bit in the
WTC register is cleared, and a warm reset is generated. The TO and WTO bits are not modified due to a
warm reset.
Setting both the WNE and WRE bits results in a warm reset, causing all watchdog timer registers and
fields (except the TO and WTO bits) to take on their initial value. If neither the WNE bit nor the WRE bit is
set, the watchdog timer behaves simply as a timer. When it expires, it resets its count value to zero and
begins incrementing at the master clock frequency. The TO bit is presented as an interrupt source to the
interrupt handler.
Watchdog Timer Count Register
Figure 4.3 Watchdog Timer Count Register (WTCOUNT)
Watchdog Timer Compare Register
Figure 4.4 Watchdog Timer Compare Register (WTCOMPARE)
COUNT
Description:
Watchdog Timer Count.
This field contains the current watchdog timer count value.
Initial Value:
0x0000_0000
(this register is not reset after a warm reset)
Read Value:
Current watchdog timer count
Write Effect:
Set watchdog timer count
COMPARE
Description:
Compare Value.
This field contains the maximum watchdog timer count value. When the value
in the WTCOUNT register equals this value, the watchdog timer expires.
Initial Value:
0xFFFF_FFFF
Read Value:
Previous value written
Write Effect:
Modify value
WTCOUNT
0
31
32
COUNT
WTCOMPARE
0
31
32
COMPARE