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IDT EJTAG System
EJTAG Test Access Port
79RC32438 User Reference Manual
20 - 60
November 4, 2002
Notes
A read of a data register corresponds only to the Capture-DR state of the TAP controller, and a write of
the data register corresponds to the Update-DR state only. The initial states of these registers are specified
with either a reset state or a power-up state. If a reset state is specified, then the indicated value is applied
IMPCODE
Implementation Identifies main debug features
implemented and accessible
through the TAP.
“Implementation Register
(TAP Instruction
IMPCODE)” on page 20-
62
Required
DATA, ALL, or
FASTDATA
Data
Data register for processor
access.
“Data Register (TAP
Instruction DATA, ALL,
or FASTDATA)” on page
20-63.
Required
ADDRESS or ALL
Address
Address register for processor
access.
“Address Register (TAP
Instruction ADDRESS or
ALL)” on page 20-64
Required
CONTROL or ALL
EJTAG Control Control register for most EJTAG
features used through the TAP.
“EJTAG Control Regis-
ter (ECR) (TAP Instruc-
tion CONTROL or ALL)”
on page 20-65
Required
BYPASS, EJTAG-
BOOT, NORMAL-
BOOT, or unused
EJTAG instructions
Bypass
Provides a one bit shift path
through the TAP.
“Bypass Register (TAP
Instruction BYPASS,
(EJTAG/NORMAL)
BOOT, or Unused)” on
page 20-70
Required
FASTDATA
Fastdata
Provides a one bit register whose
value is tagged to the front of the
Data register to capture the value
of the processor access pending
(PrAcc) bit in the EJTAG Control
register.
“FASTDATA Instruction”
on page 20-59
Required with
EJTAG ver-
sion 02.60
and higher.
TCBCONTROLA
TCBControlA
Implemented and used in the
Trace Control Block (TCB). Used
by external probe (debugger) soft-
ware to control tracing output from
the core.
See TCB documentation Required with
EJTAG ver-
sion 02.60
and higher if
trace logic is
implemented.
TCBCONTROLB
TCBControlB
Implemented and used in the
Trace Control Block (TCB). Con-
trols tracing configuration options
See TCB documentation Required with
EJTAG ver-
sion 02.60
and higher if
trace logic is
implemented.
TCBADDRESS
TCBAddress
Implemented and used in the
TCB. Used to address the on-chip
trace memory, if present.
See TCB documentation Required with
EJTAG ver-
sion 02.60
and higher if
trace logic is
implemented.
Instruction
Used to
Access
Register
Register
Name
Function
Reference
Compli-
ance
Table 20.42 EJTAG TAP Data Registers (Part 2 of 2)