IDT RC32438 Device Overview
Feature List Summary
79RC32438 User Reference Manual
1 - 4
November 4, 2002
Notes
DMA Controller
10 DMA channels
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Two channels for PCI (PCI to Memory and Memory to PCI)
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Four Ethernet channels — two for each Ethernet interface (transmit/receive)
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Two DMA channels for memory to memory DMA operations
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Two DMA channel for external DMA operations
Provides flexible descriptor based operation
Supports external peripheral DMA operations
Supports unaligned transfers (i.e., source or destination address may be on any byte boundary)
with arbitrary byte length.
Two Ethernet Interfaces
10 and 100 Mb/s ISO/IEC 8802-3:1996 compliant
Two IEEE 802.3u compatible Media Independent Interfaces (MII) with serial management interface
MII supports IEEE 802.3u auto-negotiation speed selection
Supports 64 entry hash table based multicast address filtering
512 byte transmit and receive FIFOs
Supports flow control functions outlined in IEEE Std. 802.3x-1997
PCI Interface
32-bit PCI revision 2.2 compliant
Supports host or satellite operation in both master and target modes
PCI clock
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Supports PCI clock frequencies from 16 MHz to 66 MHz
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PCI clock may be asynchronous to master clock (CLK)
PCI arbiter in Host mode
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Supports 6 external masters
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Fixed priority or round robin arbitration
I
2
O “l(fā)ike” PCI Messaging Unit
Universal Asynchronous Receiver Transmitter (UART)
Compatible with the 16550 and 16450 UARTs
Two completely separate serial channels
Modem control functions (CTS, RTS, DSR, DTR, RI, DCD)
16-byte transmit and receive buffers
Programmable baud rate generator derived from the system clock
Fully programmable serial characteristics:
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5, 6, 7, or 8 bit characters
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Even, odd or no parity bit generation and detection
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1, 1-1/2 or 2 stop bit generation
Line break generation and detection
False start bit detection
Internal loopback mode
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2
C-Bus
Supports standard 100 Kbps mode as well as 400 Kbps fast mode
Supports 7-bit and 10-bit addressing