ACE9050
2
Fig. 3 detailed block diagram of ACE9050
OUTP2 [1]/
PWM1
SYNTHDATA
SYNTHCLK
DTFG
LATCH0
LATCH1
LATCH3
LATCH2
MRI IRW ID[7:0]
ONRAD
SINTSLEEP
C1008
IRQSEND
IRQREC
LSICOM0
LSICOM1
LSICOM2
LSICOM3
LSICOM4
LSICOM5
LSICOM6
STR_WIDTH
ACE
SERIAL
INTERFACE
TO
MUX #2
SYNTHDATA
SYNTHCLK
DTFG
LATCH0
LATCH1
LATCH3
PORT3[6]
PORT4[7]
INTERRUPTS
}
EMUL ONLY
EMUL IP
EMUL DATA/AD
EMUL IP
EMUL IP
TO 6303
EMUL
AS
R/W
D [7:0]
A [7:0]
A [13:8]
A [15:14]
BUS INTERFACE
IRW
ID7:0
AD15:0
O/P IN EMULATION
DATA
INTERNAL ADDRESS
MEMORY BANK
SWITCHING
EPROM
BANK_SEL
MRI IRW ID[4:0] AD[15:14]
BA [17:14]
CSE2N
CSEPN
PULSE WIDTH MODULATOR
DAC1
DAC2
PWM #2
PWM #1
MRI IRW ID[7:0]
MUX #1
OUT2 [1]
PORT5 [0]
PORT5 [5:4]
OUT2 [2]
LATCH2
MUX CONTROL
MUX #2
OUTP2 [2]/
PWM2/
LATCH2
CONTROL
INTERNAL PORTS
MRI IRW ID[7:0] LVN1
PORT3
PORT3
PORT4
PORT4
PORT5
PORT5
PORT3 [7:0]
PORT4 [7:0]
PORT5 [7:0]
REFER TO TEXT
FOR INDIVIDUAL
BIT FUNCTIONS
EXTERNAL PORTS
IRQPRT4-RESET
IRQPRT5-MASK
IRQPRT6-READ
EXT. INTERRUPTS
OUT2 [7]
OUT2 [6]
OUT2 [5:3]
OUT2 [2]
OUT2 [1]
OUT2 [0]
KEYP R/W TO PORT
KPOT O/P TRISTATE
OUT_PORT2
O/P PORT2
INP1 [7]
INP1 [6]
INP1 [4:2]
INP1 [1:0]
IN_PORT1
I/P PORT1
KEYPORT/CHIP ID
MRI IRW ID[7:0]
NOT BONDED
TO MUX #2
TO MUX #1
TO CPUCL PIN
POWERDET
SERV
IRQE
3
2
5
4
OUTP2 [7]
OUTP2 [6]
INP1 [4:2]
INRQ [1:0]
KPO [4:0]
KPI [3:0]
I
2
C
ENABLE RESET I2C
PORT5 [2]
I2C_ADDR
I2C_DATA
I2C_CNTR
I2C_STAT
I2C_CCR
TESTN
CLKBUS IRW ID[7:0]
ISCL
ISDA
INT
8·064MHz
P1 [4]
P1 [3]
I2C_INTERRUPT
AD15:O
ID7:0
IRW READ/WRITE
EMUL
ICN COUNTER I/P
RESET MRI CLOCK E
PORT1 [7:0]
PORT2 [4]
PORT2 [3]
INTERRUPT IRQN
BAUDCLK
6303
MICROPROCESSOR
AND
KERNEL
8
IRQPRT0-RESET
IRQPRT1-MASK
IRQPRT2-READ
MRI IRW ID[7:0]
INTERRUPT
CONTROL
I
2
C INTERRUPT
IRQE (EXTERNAL INT.)
IRQTX
IRQWS
IRQBISAT
IRQRX
IRQREQ
IRQSEND
IRQTO
INTERRUPT SOURCE
IRQN
ROM
512 BYTES
(IROM)
BOOT BLOCK
ID [7:0]
AD [8:0]
IRW
IROM
RAM
6016 BYTES
(IRAM)
ID [7:0]
AD [12:0]
IRW
IRAM
MRI IRW ID[7:0]
BAUD RATE
CLOCK
BRG
ISDA ISCL
8
3
BAUD
P1 [7:0]
DFMS/P2 [4]
DTMS/P2 [3]
IRQN
BAUDCLK
XOSC-PD
TURBO
ENSIS
CLKENAB
E (CPU CLOCK)
CLKBUS
C1008
LVN1
CLOCK GENERATOR
PORT5 [6]
PORT4 [3]
PORT3 [2]
PORT5 P[1]
CPUCL
TO WATCHDOG
AND I
C
OUT2 [0]
CPUCL/
OUTP2 [0]
C1008
ECLK
XIN
XOUT
TESTN
IN_PORT1
OUT_PORT2
IRQPRT4
IRQPRT5
IRAM
EPROM
IROM
IROME
SLEEP
MRI IRW AD[15:0]
DECODER
ACE9050
REGISTER
SELECTS
MEMORY
SELECTS
PORT4 [1]
PORT3 [1]
OEN
WEN
BARENABLE
BARHIGH
BARLOW
BEEP ALARM RING
GENERATOR (BAR)
MRI ID[7:0] CLKBUS
126kHz
BAR
BAR
IRQRX
IRQBISAT
IRQWS
IRQTX
AFC/RXDATA
NOMPLL
MDMSLP
ENMOD
SAT
GENERATOR
SAT
MUX
IFC COUNTER
IFFREQ (2432/256)
STIFCN (START/RESET)
PORT3 [5]
ICN
ICN (EMUL)
AFC/RXDATA
TO 6303
PORT3 [0]
INTERRUPTS
PORT4 [4]
PORT3 [3]
PORT3 [7]
BARPORT
TEST ACCESS ONLY
MODEM
SAT MANAGEMENT
SELECT
PORT4 [2]
TXSAT
RXSAT
ID [7:0]
IRW
MRI
C1008
54kHz/450kHz
TXDATA
TXDATA
WATCHDOG AND ATO
WATCHDOG
AND
RESET LOGIC
RESATO
ATO LOGIC
IRQTO
CLKBUS IRW TESTN
REWD
FILTER
MRI
LVN1
INP1 [7]
POWDET
MASTER RESET
INP1 [6]
SERV
MRN
RXCD
TXPOW
EXRESN
POFFN
PORT3 [4] UPOFFN
V
DD
V
DDM
V
SS
MODPRT0
MODPRT1
MODPRT2
72
73
82
80
78
75
83
5
95
18-25
40,39,35-30
46-41
92,93
4
8
8
6
2
50-47
29
28
26
27
96
77
60
11, 64, 65, 68
38
10, 17, 36, 37, 86, 87
74
91
100
61
98
81
79
76
54, 53, 52
70, 71
59-55
66-69
7-9, 12-16
4
97
84
6
63
94
90
99
2
3
1
62
89
51
85