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| 型號(hào)： | AD14060LBF-4 |
| 廠商： | Analog Devices Inc |
| 文件頁數(shù)： | 38/48頁 |
| 文件大?。?/td> | 0K |
| 描述： | IC DSP CMOS 32BIT 308CQFP |
| 產(chǎn)品培訓(xùn)模塊： | SHARC Processor Overview |
| 標(biāo)準(zhǔn)包裝： | 1 |
| 系列： | SHARC® |
| 類型： | 浮點(diǎn) |
| 接口： | 主機(jī)接口，連接端口，串行端口 |
| 時(shí)鐘速率： | 40MHz |
| 非易失內(nèi)存： | 外部 |
| 芯片上RAM： | 2MB |
| 電壓 - 輸入/輸出： | 3.30V |
| 電壓 - 核心： | 3.30V |
| 工作溫度： | -40°C ~ 100°C |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 308-CBQFP |
| 供應(yīng)商設(shè)備封裝： | 308-CQFP（52x52） |
| 包裝： | 托盤 |
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AD14060/AD14060L
Rev. B | Page 43 of 48
The load capacitance should include the processor’s package
capacitance (CIN). The switching frequency includes driving the
load high and then back low. Address and data pins can drive
high and low at a maximum rate of 1/(2 tCK). The write strobe
can switch every cycle at a frequency of 1/tCK. Select pins switch
at 1/(2 tCK), but selects can switch on each cycle.
Example
Estimate PEXT with the following assumptions: a system with
one bank of external data memory RAM (32-bit);
four 128k × 8 RAM chips are used, each with a load of 10 pF;
external data memory writes occur every other cycle; a rate of
1/(4 tCK) with 50% of the pins switching; and an instruction
cycle rate is 40 MHz (tCK = 25 ns) and VDD = 5.0 V.
The PEXT equation is calculated for each class of pins that can
drive, as shown in Table 25.A typical power consumption can
now be calculated for these conditions by adding a typical
internal power dissipation:
PTOTAL = PEXT + (IDDIN2 × 5.0 V)
Note that the conditions causing a worst-case PEXT are different
from those causing a worst-case PINT. Maximum PINT cannot
occur while 100% of the output pins are switching from all 1s to
all 0s. It is uncommon for an application to have 100% or even
50% of the outputs switching simultaneously.
TEST CONDITIONS
Output Disable Time
Output pins are considered to be disabled when they stop
driving, go into a high impedance state, and start to decay from
their output high or low voltage. The time for the voltage on the
bus to decay by ΔV is dependent on the capacitive load, CL, and
the load current, IL. This decay time can be approximated by the
following equation:
L
DECAY
I
V
C
t
=
The output disable time, tDIS, is the difference between tMEASURED
interval from when the reference signal switches to when the
output voltage decays ΔV from the measured output high or
output low voltage. tDECAY is calculated with test loads CL and IL,
and with ΔV equal to 0.5 V.
Output Enable Time
Output pins are considered to be enabled when they have made
a transition from a high impedance state to when they start
driving. The output enable time, tENA, is the interval from when a
reference signal reaches a high or low voltage level to when the
output has reached a specified high or low trip point, as shown
in the output enable/disable diagram (Figure 30). If multiple
pins (such as the data bus) are enabled, the measurement value
is that of the first pin to start driving.
System Hold Time Calculation Example
To determine the data output hold time in a particular system,
first calculate tDECAY using the previous equation. Choose ΔV to
be the difference between the ADSP-2106x’s output voltage and
the input threshold for the device requiring the hold time. A
typical ΔV is 0.4 V. CL is the total bus capacitance per data line,
and IL is the total leakage or three-state current per data line.
The hold time is tDECAY plus the minimum disable time (tHDWD
for the write cycle).
00667-030
REFERENCE
SIGNAL
tDIS
OUTPUT STARTS
DRIVING
VOH (MEASURED) – V
VOL (MEASURED) + V
tMEASURED
VOH (MEASURED)
VOL (MEASURED)
2.0V
1.0V
VOH (MEASURED)
VOL (MEASURED)
HIGH-IMPEDANCE STATE.
TEST CONDITIONS CAUSE
THIS VOLTAGE TO BE
APPROXIMATELY 1.5V
OUTPUT STOPS
DRIVING
tENA
tDECAY
Figure 30. Output Enable/Disable
Table 25. PEXT Calculations
Pin Type
Number of Pins
% Switching
× C
× f
× VDD2
= PEXT
Address
15
50
× 55 pF
× 20 MHz
× 25 V
= 0.206 W
MSO
1
0
× 55 pF
× 20 MHz
× 25 V
= 0.00 W
WR
1
–
× 55 pF
× 40 MHz
× 25 V
= 0.055 W
Data
32
50
× 25 pF
× 20 MHz
× 25 V
= 0.200 W
ADRCLK
1
–
× 15 pF
× 40 MHz
× 25 V
= 0.015 W
PEXT (5 V) = 0.476 W.
PEXT (3.3 V) = 0.207 W.
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