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參數(shù)資料
| 型號(hào)： | AD6636 |
| 廠商： | Analog Devices, Inc. |
| 元件分類： | 數(shù)字上／下變頻 |
| 英文描述： | 150 MSPS Wideband Digital Down-Converter (DDC) |
| 中文描述： | 150MSPS的寬帶數(shù)字下變頻器（DDC） |
| 文件頁數(shù)： | 26/72頁 |
| 文件大?。?/td> | 1629K |
| 代理商： | AD6636 |
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AD6636
When amplitude offset correction circuit is disabled, the value
in the amplitude offset correction register multiplied with the
Q path data and added to Q path data continuously. This
method can be used to manually set the amplitude offset
instead of using the automatic amplitude offset correction
circuit.
Rev. 0 | Page 26 of 72
The amplitude of the sine and cosine are represented using 17
bits. The worst-case spurious signal from the NCO is better
than 100 dBc for all output frequencies.
Because all the filtering in the AD6636 is low-pass filtering, the
carrier of interest is tuned down to dc (frequency = 0 Hz). This
is illustrated in Figure 30. Once the signal of interest is tuned
down to dc, the unwanted adjacent carriers can be rejected
using the low-pass filtering that follows.
NCO Frequency
The NCO frequency value is given by the 32-bit twos
complement number entered in the NCO frequency register.
Frequencies between CLK/2 and CLK/2 (CLK/2 excluded)
are represented using this frequency word:
INPUT CROSSBAR MATRIX
The AD6636 has four ADC input ports and six channels. Two
input ports can be paired to support complex input ports.
Crossbar mux selection allows each channel to select its input
signal from the following sources: four real input ports, two
complex input ports, and internally generated pseudorandom
sequence (referred to as a PN sequence, which can be either real
or complex). Each channel has an input crossbar matrix to
select from the above-listed input signal choices.
0x8000 0000 represents a frequency given by CLK/2.
0x0000 0000 represents dc (frequency is 0 Hz).
The selection of the input signal for a particular channel is
made using a 3-bit crossbar mux select word and a 1-bit
complex data input bit selection in the ADC input control
register. Each channel has a separate selection for individual
control. Table 12 lists the valid combinations of the crossbar
mux select word, the complex data input bit values, and the
corresponding input signal selections.
0x7FFF FFFF represents CLK/2 CLK/2
32
.
The NCO frequency word can be calculated using following the
equation:
(
f
)
clk
clk
ch
f
f
FREQ
NCO
,
mod
2
=
_
32
NUMERICALLY CONTROLLED OSCILLATOR (NCO)
Each channel consists of an independent complex NCO and a
complex mixer. This processing stage comprises a digital tuner
consisting of three multipliers and a 32-bit complex NCO. The
NCO serves as a quadrature local oscillator capable of produc-
ing an NCO frequency of between CLK/2 and +CLK/2 with a
resolution of CLK/2
32
in complex mode, where CLK is the input
clock frequency.
where:
NCO_FREQ
is the 32-bit twos complement number represent-
ing the NCO frequency register.
f
ch
is the desired carrier frequency.
f
clk
is the clock rate for the channel under consideration.
mod( ) is a remainder function. For example, mod(110, 100) =
10 and, for negative numbers, mod(32, 10) = 2.
The frequency word used for generating the NCO is a 32-bit
word. This word is used to generate a 20-bit phase word. A
16-bit phase offset word is added to this phase word. 18 bits of
this phase word are used to generate the sine and cosine of the
required NCO frequency.
Note that this equation applies to the aliasing of signals in the
digital domain (that is, aliasing introduced when digitizing
analog signals).
Table 12. Crossbar Mux Selection for Channel Input Signal
Complex Input Bit
Crossbar Mux Select Bit
0
000
0
001
0
010
0
011
0
100
1
000
Input Signal Selection
Input Port A magnitude and exponent pins drive the channel.
Input Port B magnitude and exponent pins drive the channel.
Input Port C magnitude and exponent pins drive the channel.
Input Port D magnitude and exponent pins drive the channel.
Internal PN sequence’s magnitude and exponent bits drive the channel.
Input Ports A and B form a pair to drive I and Q paths of the channel, respectively. Input
Port A exponent pins drive the channel exponent bits.
Input Ports C and D form a pair to drive I and Q paths of the channel, respectively. Input
Port C exponent pins drive the channel exponent bits.
Internal PN sequence’s magnitude and exponent bits drive the channel.
1
001
1
010
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