參數(shù)資料
型號: ADSP-BF504BCPZ-4F
廠商: Analog Devices Inc
文件頁數(shù): 46/80頁
文件大?。?/td> 0K
描述: IC CCD SIGNAL PROCESSOR 88LFCSP
視頻文件: Blackfin? BF50x Processor Family
標(biāo)準(zhǔn)包裝: 1
系列: Blackfin®
類型: 定點(diǎn)
接口: CAN,EBI/EMI,I²C,IrDA,PPI,SPI,SPORT,UART/USART
時(shí)鐘速率: 400MHz
非易失內(nèi)存: 閃存(16MB)
芯片上RAM: 68kB
電壓 - 輸入/輸出: 3.30V
電壓 - 核心: 1.29V
工作溫度: -40°C ~ 85°C
安裝類型: 表面貼裝
封裝/外殼: 88-VFQFN 裸露焊盤,CSP
供應(yīng)商設(shè)備封裝: 88-LFCSP(12x12)
包裝: 托盤
Rev. A
|
Page 50 of 80
|
July 2011
ADSP-BF504/ADSP-BF504F/ADSP-BF506F
PROCESSOR—TEST CONDITIONS
All timing parameters appearing in this data sheet were mea-
sured under the conditions described in this section. Figure 41
shows the measurement point for AC measurements (except
output enable/disable). The measurement point V
MEAS is VDDEXT/2
for V
DDEXT (nominal) = 1.8 V/2.5 V/3.3 V.
Output Enable Time Measurement
Output pins are considered to be enabled when they have made
a transition from a high impedance state to the point when they
start driving.
The output enable time t
ENA is the interval from the point when a
reference signal reaches a high or low voltage level to the point
when the output starts driving as shown on the right side of
The time t
ENA
_MEASURED is the interval, from when the reference sig-
nal switches, to when the output voltage reaches V
TRIP(high) or
V
TRIP(low). For V
DDEXT (nominal) = 1.8 V, VTRIP (high) is 1.05 V,
and VTRIP (low) is 0.75 V. For VDDEXT (nominal) = 2.5 V, VTRIP
(high) is 1.5 V and VTRIP (low) is 1.0 V. For VDDEXT (nominal) =
3.3 V, VTRIP (high) is 1.9 V, and VTRIP (low) is 1.4 V. Time tTRIP is
the interval from when the output starts driving to when the
output reaches the V
TRIP(high) or VTRIP(low) trip voltage.
Time t
ENA is calculated as shown in the equation:
If multiple pins are enabled, the measurement value is that of
the first pin to start driving.
Figure 38. Driver Type D Current (3.3 V VDDEXT)
Figure 39. Driver Type D Current (2.5 V VDDEXT)
Figure 40. Driver Type D Current (1.8 V VDDEXT)
0
SOURCE
CURRENT
(
m
A)
SOURCE VOLTAGE (V)
0
0.5
1.0
1.5
2.0
2.5
3.0
3.5
–40
–10
VOL
V
DDEXT = 3.6V @ – 55°C
V
DDEXT = 3.3V @ 25°C
–20
–30
V
DDEXT = 3.0V @ 125°C
–50
–60
0
SOURCE
CURRENT
(
m
A)
SOURCE VOLTAGE (V)
0
0.5
1.0
1.5
2.0
2.5
–35
–25
–10
VOL
V
DDEXT = 2.75V @ – 55°C
V
DDEXT = 2.5V @ 25°C
–15
V
DDEXT = 2.25V @ 125°C
–20
–5
–30
SOURCE
CURRENT
(
m
A)
SOURCE VOLTAGE (V)
0
0.5
1.0
1.5
2
0
–16
–12
VOL
V
DDEXT = 1.9V @ – 55°C
V
DDEXT = 1.8V @ 25°C
–14
V
DDEXT = 1.7V @ 125°C
–2
–4
–8
–6
–10
Figure 41. Voltage Reference Levels for AC
Measurements (Except Output Enable/Disable)
Figure 42. Output Enable/Disable
INPUT
OR
OUTPUT
VMEAS
REFERENCE
SIGNAL
tDIS
OUTPUT STARTS DRIVING
VOH (MEASURED)
V
VOL (MEASURED) + V
tDIS_MEASURED
VOH
(MEASURED)
VOL
(MEASURED)
VTRIP(HIGH)
VOH(MEASURED)
VOL(MEASURED)
HIGH IMPEDANCE STATE
OUTPUT STOPS DRIVING
tENA
tDECAY
tENA_MEASURED
tTRIP
VTRIP(LOW)
tENA
tENA_MEASURED tTRIP
=
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