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| 型號(hào)： | ADV7330 |
| 廠商： | Analog Devices, Inc. |
| 英文描述： | Multiformat 11-Bit Triple DAC Video Encoder |
| 中文描述： | 多格式11位DAC的視頻編碼器三 |
| 文件頁(yè)數(shù)： | 41/76頁(yè) |
| 文件大?。?/td> | 1378K |
| 代理商： | ADV7330 |
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REV. B
ADV7330
–41–
SD Hue Adjust Value
[Subaddress 60h]
The hue adjust value is used to adjust the hue on the composite
and chroma outputs.
These eight bits represent the value required to vary the hue of
the video data, i.e., the variance in phase of the subcarrier during
active video with respect to the phase of the subcarrier during
the colorburst. The ADV7330 provides a range of
±
22.5
°
incre-
ments of 0.17578125
°
. For normal operation (zero adjustment),
this register is set to 80h. FFh and 00h represent the upper and
lower limits (respectively) of adjustment attainable.
(Hue Adjust) [
°
] = 0.17578125
°
×
(HCRd–128), for positive
hue adjust value.
For example, to adjust the hue by +4
°
, write 97h to the hue
adjust value register:
4
0 17578125
128
105
97
*
=
=
d
h
*
rounded to the nearest integer
To adjust the hue by –4
°
, write 69h to the hue adjust value
register:
=
=
4
0 17578125
128
105
69
*
d
h
*
rounded to the nearest integer
SD Brightness Control
[Subaddress 61h]
The brightness is controlled by adding a programmable setup
level onto the scaled Y data. This brightness level may be added
onto the scaled Y data. For NTSC with pedestal, the setup can
vary from 0 IRE to 22.5 IRE. For NTSC without pedestal and
PAL, the setup can vary from –7.5 IRE to +15 IRE.
The brightness control register is an 8-bit wide register. Seven
bits of this 8-bit register are used to control the brightness level.
This brightness level can be a positive or negative value.
For example:
Standard: NTSC with pedestal.
To add +20 IRE brightness level, write 28h to Address 61h, SD
brightness.
[
[
[
]
[
]
]
]
SDBrightnessValue H
IREValue
×
×
20
2 015631
H
H
H
H
=
=
=
=
2 015631
40 31262
28
Standard: PAL.
To add –7 IRE brightness level, write 72h to Address 61h,
SD brightness.
[
×
[
[
0001110
into twoscomplement
IREValue
b
B
h
×
]
=
]
=
[
]
=
]
=
[
]
=
2 015631
7
2 015631
.
14 109417
.
0001110
1110010
72
Table IX. Brightness Control Values
*
Setup
Level in
NTSC with
Pedestal
Setup
Level in
NTSC No
Pedestal
Setup
Level in
PAL
SD
Brightness
22.5 IRE
15 IRE
7.5 IRE
0 IRE
15 IRE
7.5 IRE
0 IRE
–7.5 IRE
15 IRE
7.5 IRE
0 IRE
–7.5 IRE
1Eh
0Fh
00h
71h
*
Values in the range of 3Fh to 44h might result in an invalid output signal.
SD Brightness Detect
[Subaddress 7Ah]
The ADV7330 allows monitoring of the brightness level of the
incoming video data. Brightness detect is a read-only register.
Double Buffering
[Subaddress 13h, Bit 7; Subaddress 48h, Bit 2]
Double-buffered registers are updated once per field on the
falling edge of the VSYNC signal. Double buffering improves
the overall performance since modifications to register settings
will not be made during active video, but take effect on the start
of the active video.
Double buffering can be activated on the following HD registers:
HD Gamma A and Gamma B curves, and HD CGMS registers.
Double buffering can be activated on the following SD registers:
SD Gamma A and Gamma B curves, SD Y scale, SD U scale,
SD V scale, SD brightness, SD closed captioning, and
SD Macrovision Bits 5–0.
NTSC WITHOUT PEDESTAL
NO SETUP
VALUE ADDED
POSITIVE SETUP
VALUE ADDED
100 IRE
0 IRE
NEGATIVE SETUP
VALUE ADDED
–7.5 IRE
+7.5 IRE
Figure 30. Examples of Brightness Control Values
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|---|---|
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| ADV73306703 | 制造商:LG Corporation 功能描述:Frame Assembly |
| ADV73306704 | 制造商:LG Corporation 功能描述:Frame Assembly |
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