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參數(shù)資料
| 型號： | ADV7330 |
| 廠商： | Analog Devices, Inc. |
| 英文描述： | Multiformat 11-Bit Triple DAC Video Encoder |
| 中文描述： | 多格式11位DAC的視頻編碼器三 |
| 文件頁數(shù)： | 55/76頁 |
| 文件大小： | 1378K |
| 代理商： | ADV7330 |
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REV. B
ADV7330
–55–
W0 W1 W2 W3 W4 W5 W6 W7 W8 W9 W10
W11W12W13
ACTIVE
VIDEO
RUN-IN
SEQUENCE
START
CODE
500mV
11.0 s
38.4 s
42.5 s
Figure 57. WSS Waveform Diagram
Bit
Description
Bit 0–Bit 2
Bit 3
B0, B1, B2 B3
0
0
1
0
0
1
Aspect Ratio/Format/Position
Odd Parity Check of Bit 0 to Bit 2
Aspect Ratio Format
4:3
Full Format
14:9
Letterbox
14:9
Letterbox
Position
N/A
Center
Top
0
0
0
1
0
0
1
0
1
0
1
B4
0
1
B5
0
1
1
0
0
1
1
0
1
1
1
1
1
0
1
1
0
16:9
16:9
>16:9
14:9
16:9
Letterbox
Letterbox
Letterbox
Full Format
N/A
Center
Top
Center
Center
N/A
Camera Mode
Film Mode
Standard Coding
Motion Adaptive Color Plus
Bit
Description
B6
0
1
B7
B9 B10
0 0
1 0
0 1
1 1
B11
0
1
B12
B13
No Helper
Modulated Helper
Reserved
No Open Subtitles
Subtitles in Active Image Area
Subtitles out of Active Image Area
Reserved
No Surround Sound Information
Surround Sound Mode
Reserved
Reserved
Table XVIII. Function of WSS Bits
APPENDIX 2—SD WIDE SCREEN SIGNALING
[Subaddress 59h, 5Ah, 5Bh]
The ADV7330 supports wide screen signaling (WSS) conform-
ing to the standard. WSS data is transmitted on Line 23. WSS
data can be transmitted only when the ADV7330 is configured
in PAL mode. The WSS data is 14 bits long, and the function
of each of these bits is shown in Table XVII. The WSS data is
preceded by a run-in sequence and a start code (see Figure 57).
If SD WSS [Address 59h, Bit 7] is set to Logic 1, it enables the
WSS data to be transmitted on Line 23. The latter portion of
Line 23 (42.5
μ
s from the falling edge of
HSYNC
) is available
for the insertion of video.
It is possible to blank the WSS portion of Line 23 with
Subaddress 61h, Bit 7.
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