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參數(shù)資料
| 型號(hào)： | AM79C930VCW |
| 廠商： | ADVANCED MICRO DEVICES INC |
| 元件分類： | 微控制器/微處理器 |
| 英文描述： | PCnet-Mobile Single-Chip Wireless LAN Media Access Controller |
| 中文描述： | 2 CHANNEL(S), LOCAL AREA NETWORK CONTROLLER, PQFP144 |
| 封裝： | TQFP-144 |
| 文件頁(yè)數(shù)： | 34/161頁(yè) |
| 文件大?。?/td> | 691K |
| 代理商： | AM79C930VCW |
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AMD
P R E L I M I N A R Y
34
Am79C930
for an output function. This means that there are con-
figurations for which a read of the pin data register bit will
not reflect what has most recently been written to the pin
data register bit ( i.e., if a pin is configured as an output
with its data source as some internal circuit, then the
user may write the pin data bit with a given value, and a
read of this same bit will yield the output function value,
which may not necessarily match the value just written
to the data bit). This functionality is given as a note
following each table. Also note that for a few pins,
the read and write locations for the pin data are in
different places.
Pin 1: USER2/LA19
The USER2/LA19 pin may be configured for input op-
eration, output operation, or ISA LA19 operation accord-
ing to the following table:
USER2/
LA19
USER2/
LA19
Pin Data
NA
PCMCIA USER2EN
Pin
0
TCR14[2] Pin Direction
X
I
(LA19 input function)
NA
TIR29[2]
1
1
0
1
I
O
Note that a read of the USERDT[2] bit (TIR29[2]) will al-
ways give the current USER2/LA19 pin value, regard-
less of pin configuration setting.
Pin 2: USER3/SA16
The USER3/SA16 pin may be configured for input op-
eration, output operation, or ISA SA16 operation ac-
cording to the following table:
USER3/
SA16
USER3/
SA16
Pin Data
NA
PCMCIA USER3EN
Pin
0
TCR14[3] Pin Direction
X
I
(SA16 input function)
NA
TIR29[3]
1
1
0
1
I
O
Note that a read of the USERDT[3] bit (TIR29[3]) will al-
ways give the current USER3/SA16 pin value, regard-
less of pin configuration setting.
Pin 3: USER4/LA17
The USER4/LA17 pin may be configured for input op-
eration, output operation, or ISA LA17 operation accord-
ing to the following table:
USER4/
LA17
USER4/
LA17
Pin Data
NA
PCMCIA USER4EN
Pin
0
TCR14[4] Pin Direction
X
I
(LA17 input function)
NA
TIR29[4]
1
1
0
1
I
O
Note that a read of the USERDT[4] bit (TIR29[4]) will al-
ways give the current USER4/LA17 pin value, regard-
less of pin configuration setting.
Pin 45:
STSCHG
/BALE
The
STSCHG
/BALE pin may be configured for input op-
eration, output operation, or ISA BALE operation ac-
cording to the following table:
STSCHG
/
BALE
Pin Direction
I
STSCHG
/
BALE
Pin Data
NA
(BALE input
function)
MIR9[0]
MIR9[0]
OR CCSR[4]
PCMCIA STSCHGFN
Pin
0
TCR15[0]
X
1
1
0
1
O
O
MIR9[0] is the
STSCHGD
bit. In PCMCIA mode,
STSCHGD
basically acts like a UNMASKING function
for the
STSCHG
pin.
STSCHGD
can be used to prevent
the WAKEUP signal from the PCMCIA Card Configura-
tion and Status Register from being signaled on the
STSCHG
pin. Note that if STSCHGFN is set to 1 and
STSCHGD is set to a 0, then the
STSCHG
pin will al-
ways be deasserted (i.e., it will be MASKED). With
STSCHGFN=1, writing a 1 to the STSCHGD bit will
UNMASK the WAKEUP status and allow it to be applied
to the
STSCHG
pin.
Note that the STSCHGD bit is automatically RESET to 0
whenever the WAKEUP bit of the PCMCIA Card Con-
figuration and Status Register is RESET to 0. Therefore,
the UNMASK bit (STSCHGD) needs to be set to
UNMASK (=1) for each new use of the WAKEUP signal.
When STSCHGFN is set to 0, then the STSCHGD bit
will become an inverted source for the
STSCHG
pin value.
Note that a read of the STSCHGD bit (MIR9[0]) will al-
ways give the inverse of the current
STSCHG
/BALE pin
value, regardless of pin configuration setting.
Pin 90: USER0/
RFRSH
The USER0/
RFRSH
pin may be configured for input op-
eration, output operation, or ISA
RFRSH
operation ac-
cording to the following table:
USER0/
RFRSH
Pin Direction
I
USER0/
RFRSH
Pin Data
NA
(
RFRSH
input
function)
NA
TIR29[0]
PCMCIA
Pin
0
USER0EN
TCR14[0]
X
1
1
0
1
I
O
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| AM79C940VCW | Media Access Controller for Ethernet (MACE) |
| AM79C940 | Media Access Controller for Ethernet (MACE) |
| AM79C940JCW | Media Access Controller for Ethernet (MACE) |
| AM79C940KCW | Media Access Controller for Ethernet (MACE) |
| AM79C960 | PCnetTM-ISA Single-Chip Ethernet Controller |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| AM79C940 | 制造商:AMD 制造商全稱:Advanced Micro Devices 功能描述:Media Access Controller for Ethernet (MACE) |
| AM79C940_00 | 制造商:AMD 制造商全稱:Advanced Micro Devices 功能描述:Media Access Controller for Ethernet (MACE⑩) |
| AM79C940-16/25 | 制造商:未知廠家 制造商全稱:未知廠家 功能描述: |
| AM79C940-16JC | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:LAN Node Controller |
| AM79C940-25JC | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:LAN Node Controller |
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