- 您現(xiàn)在的位置：買(mǎi)賣(mài)IC網(wǎng) > PDF目錄366550 > AM79C930VCW (ADVANCED MICRO DEVICES INC) PCnet-Mobile Single-Chip Wireless LAN Media Access Controller PDF資料下載
參數(shù)資料
| 型號(hào)： | AM79C930VCW |
| 廠商： | ADVANCED MICRO DEVICES INC |
| 元件分類(lèi)： | 微控制器/微處理器 |
| 英文描述： | PCnet-Mobile Single-Chip Wireless LAN Media Access Controller |
| 中文描述： | 2 CHANNEL(S), LOCAL AREA NETWORK CONTROLLER, PQFP144 |
| 封裝： | TQFP-144 |
| 文件頁(yè)數(shù)： | 45/161頁(yè) |
| 文件大?。?/td> | 691K |
| 代理商： | AM79C930VCW |
第1頁(yè)第2頁(yè)第3頁(yè)第4頁(yè)第5頁(yè)第6頁(yè)第7頁(yè)第8頁(yè)第9頁(yè)第10頁(yè)第11頁(yè)第12頁(yè)第13頁(yè)第14頁(yè)第15頁(yè)第16頁(yè)第17頁(yè)第18頁(yè)第19頁(yè)第20頁(yè)第21頁(yè)第22頁(yè)第23頁(yè)第24頁(yè)第25頁(yè)第26頁(yè)第27頁(yè)第28頁(yè)第29頁(yè)第30頁(yè)第31頁(yè)第32頁(yè)第33頁(yè)第34頁(yè)第35頁(yè)第36頁(yè)第37頁(yè)第38頁(yè)第39頁(yè)第40頁(yè)第41頁(yè)第42頁(yè)第43頁(yè)第44頁(yè)當(dāng)前第45頁(yè)第46頁(yè)第47頁(yè)第48頁(yè)第49頁(yè)第50頁(yè)第51頁(yè)第52頁(yè)第53頁(yè)第54頁(yè)第55頁(yè)第56頁(yè)第57頁(yè)第58頁(yè)第59頁(yè)第60頁(yè)第61頁(yè)第62頁(yè)第63頁(yè)第64頁(yè)第65頁(yè)第66頁(yè)第67頁(yè)第68頁(yè)第69頁(yè)第70頁(yè)第71頁(yè)第72頁(yè)第73頁(yè)第74頁(yè)第75頁(yè)第76頁(yè)第77頁(yè)第78頁(yè)第79頁(yè)第80頁(yè)第81頁(yè)第82頁(yè)第83頁(yè)第84頁(yè)第85頁(yè)第86頁(yè)第87頁(yè)第88頁(yè)第89頁(yè)第90頁(yè)第91頁(yè)第92頁(yè)第93頁(yè)第94頁(yè)第95頁(yè)第96頁(yè)第97頁(yè)第98頁(yè)第99頁(yè)第100頁(yè)第101頁(yè)第102頁(yè)第103頁(yè)第104頁(yè)第105頁(yè)第106頁(yè)第107頁(yè)第108頁(yè)第109頁(yè)第110頁(yè)第111頁(yè)第112頁(yè)第113頁(yè)第114頁(yè)第115頁(yè)第116頁(yè)第117頁(yè)第118頁(yè)第119頁(yè)第120頁(yè)第121頁(yè)第122頁(yè)第123頁(yè)第124頁(yè)第125頁(yè)第126頁(yè)第127頁(yè)第128頁(yè)第129頁(yè)第130頁(yè)第131頁(yè)第132頁(yè)第133頁(yè)第134頁(yè)第135頁(yè)第136頁(yè)第137頁(yè)第138頁(yè)第139頁(yè)第140頁(yè)第141頁(yè)第142頁(yè)第143頁(yè)第144頁(yè)第145頁(yè)第146頁(yè)第147頁(yè)第148頁(yè)第149頁(yè)第150頁(yè)第151頁(yè)第152頁(yè)第153頁(yè)第154頁(yè)第155頁(yè)第156頁(yè)第157頁(yè)第158頁(yè)第159頁(yè)第160頁(yè)第161頁(yè)
P R E L I M I N A R Y
AMD
45
Am79C930
Memory Interface
The memory interface is provided to support direct con-
nection of both a non-volatile memory (typically Flash
memory) and an SRAM and an additional peripheral de-
vice. Separate chip enables for Flash, SRAM, and an
extra peripheral device exist in the memory interface.
The 32K range of address space visible at the system
interface (either PCMCIA or ISA Plug and Play) maps to
a total of 256K of memory through the use of a device
select bit and bank switching bits in the Bank Switching
Select register (SIR1). 128K of space is reserved
for Flash memory and 128K of space is reserved for
SRAM. The 32 bytes of space reserved for the extra pe-
ripheral device are only accessible by the embedded
80188 core.
The internal Transceiver Attachment Unit also resides
on the memory interface bus and uses 8 bytes (or 32)
bytes of I/O space as viewed by the system interface.
These same registers occupy 32 bytes of the SRAM’s
memory space (i.e., instead of I/O space) as viewed by
the embedded 80188 core. The MIR registers of the BIU
occupy an additional 16 bytes of SRAM space as
viewed by the embedded 80188 core. The MIR registers
are not visible to the system interface.
The memory interface bus is shared between the sys-
tem interface and the embedded 80188 processor.
Memory interface bus sharing between the system in-
terface and the 80188 processor core is based upon an
equal priority delivered in a round robin fashion. When-
ever the system interface is accessing a device on the
memory interface bus, then the 80188 core is placed
into ready wait. Whenever the 80188 core is accessing a
device on the memory interface bus, then the system in-
terface bus activity will be given a ready wait. When the
current memory interface bus master has completed its
cycle, then the other memory interface bus master will
be given control of the memory interface bus.
The 80188 memory accesses are directed toward
Flash, SRAM, the
XCE
peripheral device, TAI registers
(TIR/TCR), or BIU registers (MIR) according to the
UCS
and
LCS
signals of the 80188 core. Normally, whenever
UCS
is active during an 80188 memory access, the ac-
cess is directed toward the Flash memory; and when-
ever
LCS
is active during an 80188 memory access, the
access is directed toward the SRAM memory or the
XCE
peripheral device or the TAI registers or BIU regis-
ters. Along with the
UCS
and
LCS
signals, 17 of the
80188 address lines are internally connected through
the BIU to the memory interface bus, allowing 256K of
memory to be addressed by the 80188. (128K of Flash
and 128K of SRAM/
XCE
/TAI/BIU may be addressed by
the 80188, for a total of 256K of memory.)
An alternate addressing mode will alias the upper
96 Kbytes of Flash memory into the upper 96 Kbytes of
SRAM space, while preserving the location of the lower
32K of SRAM, the
XCE
peripheral, and the TAI/BIU
registers. This mode allows for 32K of SRAM/
XCE
/TAI/
BIU and 32K of Flash to reside in a single 64 Kbyte seg-
ment of 80188 memory space. This mode is selected
through a bit in the MIR0 register.
The TAI connects to only a portion of the memory inter-
face bus. Specifically, the lowest five address bits and
the entire data bus of the memory interface connect to
the TAI. A separate internal chip select signal for the TAI
exists to avoid confusion among slave devices. This sig-
nal is not available on the Am79C930 memory interface
bus, and therefore, memory interface cycles may be ob-
served for which neither the Flash chip enable, nor the
SRAM chip enable, nor the
XCE
signal is asserted.
Similar behavior is observed when the 80188 core is ac-
cessing registers which are located within the BIU.
Embedded 80188
The embedded 80188 core provides the basic means
for implementing IEEE 802.11 (draft) MAC functionality.
The elements of the Am79C930 device that are involved
in MAC function include the 80188 core, the Flash mem-
ory, the SRAM memory, the timers within the 80188, the
sleep timer in the BIU, the Transceiver Attachment Unit,
and the associated busses and signaling that connect
the 80188 core to the BIU and the Transceiver
Attachment Unit.
The Am79C930 device directly incorporates some of
the basic protocol requirements for operation of a IEEE
802.11 (draft) node. Other portions of the IEEE 802.11
(draft) MAC protocol need to be created with appropri-
ate firmware written to execute on the 80188 core.
With proper 80188 coding, the Am79C930 device
can be made to operate according to the
IEEE 802.11 (draft).
Media Access Management
— The IEEE 802.11
(draft) protocol defines a media access mechanism
which permits all stations to access the channel with
equality. Synchronous time-bounded service and asyn-
chronous time-bounded access service are also defined
in the IEEE 802.11 (draft) specification. Any node can
attempt to contend for the channel by waiting for a pre-
determined time (Inter Frame Spacing) after the last ac-
tivity, and then waiting an additional random backoff
time before determining whether to attempt to transmit
on the media. If two or more nodes simultaneously con-
tend for the channel, their signals will interact causing
loss of data, defined as a collision. It is the responsibility
of the MAC to attempt to avoid and recover from a colli-
sion in order to insure data integrity for the end-to-end
transmission to the receiving station.
Medium Allocation
The IEEE 802.11 (draft) standard requires that each
Carrier Sense Multiple Access/Collision Avoidance
(CSMA/CA) MAC monitor the medium for traffic by
watching for carrier activity. When carrier is detected,
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| AM79C940VCW | Media Access Controller for Ethernet (MACE) |
| AM79C940 | Media Access Controller for Ethernet (MACE) |
| AM79C940JCW | Media Access Controller for Ethernet (MACE) |
| AM79C940KCW | Media Access Controller for Ethernet (MACE) |
| AM79C960 | PCnetTM-ISA Single-Chip Ethernet Controller |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| AM79C940 | 制造商:AMD 制造商全稱(chēng):Advanced Micro Devices 功能描述:Media Access Controller for Ethernet (MACE) |
| AM79C940_00 | 制造商:AMD 制造商全稱(chēng):Advanced Micro Devices 功能描述:Media Access Controller for Ethernet (MACE⑩) |
| AM79C940-16/25 | 制造商:未知廠家 制造商全稱(chēng):未知廠家 功能描述: |
| AM79C940-16JC | 制造商:未知廠家 制造商全稱(chēng):未知廠家 功能描述:LAN Node Controller |
| AM79C940-25JC | 制造商:未知廠家 制造商全稱(chēng):未知廠家 功能描述:LAN Node Controller |
發(fā)布緊急采購(gòu)，3分鐘左右您將得到回復(fù)。