參數(shù)資料
型號： AM79C930VCW
廠商： ADVANCED MICRO DEVICES INC
元件分類： 微控制器/微處理器
英文描述： PCnet-Mobile Single-Chip Wireless LAN Media Access Controller
中文描述： 2 CHANNEL(S), LOCAL AREA NETWORK CONTROLLER, PQFP144
封裝： TQFP-144
文件頁數(shù)： 89/161頁
文件大小： 691K
代理商： AM79C930VCW
P R E L I M I N A R Y
AMD
89
Am79C930
TIR0: Network Control
General control for the transceiver device attached to
the transceiver interface pins.
Bit
Name
Reset Value
Description
7
LNK
pin
Link LED. The inverse of the LNK bit value is driven onto the
LNK
pin when the
LNK
pin has been enabled for output.
The value read from LNK will always represent the inversion of the
current value of the
LNK
pin. The control of the function of the
LNK
pin is described in the Multi-Function Pinsection.
Activity LED. The inverse of the ACT bit value is driven onto the
ACT
pin when the
ACT
pin has been enabled for output.
The value read from ACT will always represent the inversion of the
current value of the
ACT
pin. The control of the function of the
ACT
pin is described in the Multi-Function Pinsection.
TAI reset. Active high. Asserting this bit will reset the TAI portion of
the Am79C930 device, except for this register (i.e., TIR0).
Software Strobe. This bit is intended for software development use.
The value written to this bit will be sent to the test output when the
device is programmed for test mode.
Reserved. Must be written as a 0. Reads of these bits produce
undefined data.
RX Power control. The inverse of the RXP bit value is driven onto
the
RXPE
pin when the
RXPE
pin has been enabled for output.
The value read from RXP will always represent the inverted logical
sense of the current value of the
RXPE
pin. The control of the func-
tion of the
RXPE
pin is described in the Multi-Function Pinsection.
Low Frequency Power control. The inverse of the LFPE bit value is
driven onto the
LFPE
pin when the
LFPE
pin has been enabled
for output.
The value read from LFPE will always represent the inverted logical
sense of the current value of the
LFPE
pin. The control of the func-
tion of the
LFPE
pin is described in the Multi-Function Pinsection.
High Frequency Power control. The inverse of the HFPE bit value is
driven onto the
HFPE
pin when the
HFPE
pin has been enabled
for output.
The value read from HFPE will always represent the inverted
logical sense of the current value of the
HFPE
pin. The control of
the function of the
HFPE
pin is described in the Multi-Function
Pinsection.
6
ACT
pin
5
SRES
0
4
SSTRB
0
3
Reserved
–
2
RXP
0
1
LFPE
0
0
HFPE
0
TIR1: Network Status
The TAI Network status register is a general network
status register.
Bit
Name
Reset Value
Description
7
6–3
TSTO
Reserved
0
–
Test Output. This bit is the result of the test multiplexer.
Reserved. Must be written as a 0. Reads of these bits produce
undefined data.
Interrupt Request. This bit represents the current value of the IRQ
output pin. When IRQ has the value 1, then an interrupt request
is active.
2
IRQ
0
相關(guān)PDF資料
PDF描述
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相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
AM79C940 制造商:AMD 制造商全稱:Advanced Micro Devices 功能描述:Media Access Controller for Ethernet (MACE)
AM79C940_00 制造商:AMD 制造商全稱:Advanced Micro Devices 功能描述:Media Access Controller for Ethernet (MACE⑩)
AM79C940-16/25 制造商:未知廠家 制造商全稱:未知廠家 功能描述:
AM79C940-16JC 制造商:未知廠家 制造商全稱:未知廠家 功能描述:LAN Node Controller
AM79C940-25JC 制造商:未知廠家 制造商全稱:未知廠家 功能描述:LAN Node Controller
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