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參數(shù)資料
| 型號： | AM79C930VCW |
| 廠商： | ADVANCED MICRO DEVICES INC |
| 元件分類： | 微控制器/微處理器 |
| 英文描述： | PCnet-Mobile Single-Chip Wireless LAN Media Access Controller |
| 中文描述： | 2 CHANNEL(S), LOCAL AREA NETWORK CONTROLLER, PQFP144 |
| 封裝： | TQFP-144 |
| 文件頁數(shù)： | 66/161頁 |
| 文件大?。?/td> | 691K |
| 代理商： | AM79C930VCW |
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AMD
P R E L I M I N A R Y
66
Am79C930
The SRAM is intended to serve as a shared memory re-
source between the driver operating through the system
interface and the 80188 core operating through the
Am79C930 memory interface bus. Even though SRAM
memory locations 0 0400h through 0 043Fh are acces-
sible from the system interface, these locations cannot
be used for driver-firmware shared memory functions,
since they are inaccessible from the 80188 core.
ISA Plug and Play I/O Resources
— The Am79C930
device occupies 16 bytes of I/O space. The 40-byte I/O
option is not available in the ISA Plug and Play mode of
operation. The EIOW bit (bit 2 of the BSS register
(SIR1)) will be forced to 0 when the Am79C930 device
has been placed into ISA Plug and Play mode. The I/O
space of the Am79C930 device contains the General
Configuration Register, the Bank Switching Select Reg-
ister, and the set of 32 TIR registers. Additionally, all
Am79C930 resources are accessible through I/O ac-
cesses, i.e., all memorystructures are accessible
through the Local Memory Address and I/O Data
Ports (SIR2,3,4,5,6,7).
The Local Memory Address port plus SIR1[5:3] function
together as a pointer to the memory resources of the
Am79C930 device. SIR1[5] determines the device se-
lected (SRAM or Flash) and SIR1[4:3], and LMA[14:0]
supply the address to the selected device whenever the
I/O Data Port is read or written. Whenever any of the I/O
Data Ports is accessed, then the Local Memory Address
Port value is automatically incremented by a value of 1.
The next table indicates the mapping of all I/O resources
that are accessible through the Am79C930 ISA
system interface.
Note that some resources are physically located within
the BIU, while others are located in the TAI, and still oth-
ers exist as external Flash and SRAM. Also note that
additional registers for ISA Plug and Play exist in the BIU
and are indirectly accessed through the Plug and Play
ADDRESS, WRITE_DATA, and READ_DATA ports.
All resources are 1 byte in width.
When accessing Am79C930 I/O resources through ISA
I/O cycle accesses, the upper 8 bits of the ISA system
address will be ignored. Only the lower 16 bits of
address will be used to check for a match of the address
range assigned to the Am79C930 device by the Plug
and Play configuration program (i.e., the I/O Base Ad-
dress = IOBA). (The Plug and Play configuration pro-
gram will have written an I/O base address value into the
I/O Base Address registers (Plug and Play ports 60h
and 61h) following system boot up and auto-configura-
tion.) The ISA Plug and Play I/O base address mustbe
aligned to a 16-byte boundary in I/O space. This align-
ment requirement should be included in the Resource
Data I/O Port Descriptor Base Alignment field that is
programmed into the Flash device and read by the Plug
and Play configuration utility. These conditions mustbe
satisfied for proper operation.
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PDF描述 |
|---|---|
| AM79C940VCW | Media Access Controller for Ethernet (MACE) |
| AM79C940 | Media Access Controller for Ethernet (MACE) |
| AM79C940JCW | Media Access Controller for Ethernet (MACE) |
| AM79C940KCW | Media Access Controller for Ethernet (MACE) |
| AM79C960 | PCnetTM-ISA Single-Chip Ethernet Controller |
相關代理商/技術參數(shù) |
參數(shù)描述 |
|---|---|
| AM79C940 | 制造商:AMD 制造商全稱:Advanced Micro Devices 功能描述:Media Access Controller for Ethernet (MACE) |
| AM79C940_00 | 制造商:AMD 制造商全稱:Advanced Micro Devices 功能描述:Media Access Controller for Ethernet (MACE⑩) |
| AM79C940-16/25 | 制造商:未知廠家 制造商全稱:未知廠家 功能描述: |
| AM79C940-16JC | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:LAN Node Controller |
| AM79C940-25JC | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:LAN Node Controller |
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