8/01/00
Am79C976
125
P R E L I M I N A R Y
0<<
Offset 08Ch
-0
This register controls the automatic polling of a user-
selectable external PHY register, AP_REG2.
All bits in this register are set to their default values by
H_RESET. All bits are also set to their default values
before EEPROM data are loaded or after an EEPROM
read failure.
The default value for all bits in this register is 0.
Table 34. AUTOPOLL2: Auto-Poll2 Register
Bit
Name
Description
15
AP_REG2_EN
Enable Bit for Autopoll Register 2. When this bit and the Auto-Poll External PHY bit (APEP) in
CMD1 are both set to 1, the Auto-Poll State Machine periodically reads the external PHY
register selected by the AP_PHY2_ADDR and AP_REG2_ADDR fields and sets the APINT2
interrupt bit if it detects a change in the register
’
s contents.
14-13
RES
Reserved locations. Written as zeros and read as undefined.
12-8
AP_REG2_ADDR
AP_REG2 Address. This field contains the register number of an external PHY register that
the Auto-Poll State Machine will periodically read if the AP_REG2_EN bit in this register and
the APEP bit (CMD3, bit 24) is set.
7
RES
Reserved location. Written as zero and read as undefined.
6
AP_PRE_SUP2
Auto-Poll Preamble Suppression. If this bit is set to 1, the Auto-Poll State Machine will suppress
the preambles of the MII Management Frames that it uses to periodically read the external
PHY register selected by the AP_PHY2_ADDR and AP_REG2_ADDR fields.
This bit is ignored when the AP_PHY2_DFLT bit is set.
5
AP_PHY2_DFLT
Auto-Poll PHY2 Default. When this bit is set, the Auto-Poll State Machine ignores the contents
of the AP_PHY2_ADDR and AP_PRE_SUP2 fields and uses the AP_PHY0_ADDR field for
the address of the PHY device to be polled. If this bit is set, the Auto-Poll State Machine will
suppress preambles only if the Port Manager has determined that the default external PHY can
accept MII Management Frames without preambles. (The Port Manager examines bit 6 in
register 1 of the default PHY to make this determination.)
4-0
AP_PHY2_ADDR
Auto-Poll PHY2 Address. This field contains the address of the external PHY that contains
AP_REG2.
This bit is ignored when the AP_PHY2_DFLT bit is set.