
8/01/00
Am79C976
203
P R E L I M I N A R Y
6
LNKSE
Link Status Enable. When this bit
is set, a value of 1 will be passed
to the LEDOUT bit in this register
in Link Pass state.
Read/Write accessible. LNKSE
is cleared by H_RESET and is
not affected by S_RESET or set-
ting the STOP bit.
5
RCVME
Receive Match Status Enable.
When this bit is set, a value of 1 is
passed to the LEDOUT bit in this
register when there is receive ac-
tivity on the network that has
passed the address match func-
tion for this node. All address
matching modes are included:
physical, logical filtering, broad-
cast, and promiscuous.
Read/Write accessible. RCVME
is cleared by H_RESET and is
not affected by S_RESET or set-
ting the STOP bit.
4
XMTE
Transmit Status Enable. When
this bit is set, a value of 1 is
passed to the LEDOUT bit in this
register when there is transmit
activity on the network.
Read/Write accessible. XMTE is
set to 1 by H_RESET and is not
affected by S_RESET or setting
the STOP bit.
3
RES
Reserved location. Written and
read as zeros.
2
RCVE
Receive Status Enable. When
this bit is set, a value of 1 is
passed to the LEDOUT bit in this
register when there is receive ac-
tivity on the network.
Read/Write accessible. RCVE is
set to 1 by H_RESET and is not
affected by S_RESET or setting
the STOP bit.
1
SFBDE
Start Frame/Byte Delimiter En-
able. When this bit is set, a value
of 1 is passed to the LEDOUT bit
in this register when the RXD[3:0]
pins are presenting the least sig-
nificant nibble of valid frame data.
Read/Write accessible. RCVE is
cleared by H_RESET and is not
affected by S_RESET or setting
the STOP bit.
0
COLE
Collision Status Enable. When
this bit is set, a value of 1 is
passed to the LEDOUT bit in this
register when there is collision
activity on the network.
Read/Write accessible. COLE is
cleared by H_RESET and is not
affected by S_RESET or setting
the STOP bit.
,<%*
BCR6 controls the function(s) that the LED2 pin dis-
plays. Multiple functions can be simultaneously enabled
on this LED pin. The LED display will indicate the logical
OR of the enabled functions. BCR5 defaults to 100 Mb/
s speed indication (100E = 1) with pulse stretcher en-
abled (PSE = 1).
Note:
When LEDPE (BCR2, bit 12) is set to 1, pro-
gramming of the LED2 Status register is enabled.
When LEDPE is cleared to 0, programming of the
LED2 register is disabled. Writes to this register will be
ignored.
Note:
Bits 15-0 in this register are programmable
through the EEPROM PREAD operation.
Bit
Name
Description
31-16
RES
Reserved locations. Written as
zeros and read as undefined.
15
LEDOUT
This bit indicates the current
(non-stretched) value of the LED
output pin. A value of 1 in this bit
indicates that the OR of the en-
abled signals is true.
The logical value of the LEDOUT
status signal is determined by the
settings of the individual Status
Enable bits of the LED register
(bits 8 and 6-0).
This bit is read only; writes have
no effect. LEDOUT is unaffected
by H_RESET, S_RESET, or
STOP.
14
LEDPOL
LED Polarity. When this bit has
the value 0, the LED pin will be
driven to a LOW level whenever
the OR of the enabled signals is
true. The LED pin will be disabled