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參數(shù)資料
| 型號： | AM79C976KIW |
| 廠商： | ADVANCED MICRO DEVICES INC |
| 元件分類： | 微控制器/微處理器 |
| 英文描述： | PCnet-PRO⑩ 10/100 Mbps PCI Ethernet Controller |
| 中文描述： | 1 CHANNEL(S), 100M bps, LOCAL AREA NETWORK CONTROLLER, PQFP208 |
| 封裝： | PLASTIC, QFP-208 |
| 文件頁數(shù)： | 85/309頁 |
| 文件大?。?/td> | 2070K |
| 代理商： | AM79C976KIW |
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8/01/00
Am79C976
85
P R E L I M I N A R Y
register number field is fixed at 1 (which corresponds to
the external PHY status register), and the register is al-
ways enabled. This means that if the Auto-Poll State
Machine is enabled, it will always poll register 1 of the
default PHY and will interrupt the host CPU when it de-
tects a change in that register.
In addition to the PHY address, register number, and
enable bit, the Auto-Poll Registers contain two other
control bits for each of the 5 user-selected registers.
These bits are the Preamble Suppression
(AP_PRE_SUP) and Default PHY (AP_DFLT_PHY)
bits.
If the Preamble Suppression bit is set, the Auto-Poll
sends management frames to the corresponding regis-
ter with no preamble field. The host CPU should only
set the Preamble Suppression bit for registers in PHY
devices that are known to be able to accept manage-
ment frames without preambles. For PHY devices that
comply with Clause 22 of IEEE Std 802.3, bit 6 of PHY
register 1 is fixed at 1 if the PHY will accept manage-
ment frames with the preamble suppressed.
If the Default PHY bit (AP_DFLT_PHY) is set, the cor-
responding Preamble Suppression bit and PHY ad-
dress field are ignored. In this case the Auto-Poll State
Machine uses the default PHY address from the
AP_PHY0_ADDR field, and suppresses the preamble
if the Network Port Manager logic has determined that
the default PHY device accepts management frames
with no preamble. If the Network Port Manager logic
has not determined that the default PHY device ac-
cepts management frames with no preamble, the Auto-
Poll State Machine does not suppress the preamble
when accessing the selected register.
The Auto-Poll State Machine is enabled when the Auto-
Poll External PHY (APEP) bit (CMD3, bit 24) is set to 1.
If APEP is cleared to 0, the Auto-Poll machine does not
poll any PHY registers regardless of the state of the en-
able bits in the Auto-Poll registers. The APEP bit has no
effect on the Network Port Manager, which may poll the
default PHY even when the state of the APEP bit is 0.
The Auto-Poll
’
s frequency of generating MII manage-
ment frames can be adjusted by setting of the APDW
bits (BCR32, bits 10-8). The delay can be adjusted
from 0 MDC periods to 2048 MDC periods.
870#
The Am79C976 controller is unique in that it does not
require software intervention to control and configure
an external PHY attached to the MII. This feature was
included to ensure backwards compatibility with exist-
ing software drivers. The Am79C976 controller will op-
erate with existing PCnet drivers from revision 2.5
upward (although older drivers will report incorrect sta-
tistics for the Am79C976 device). The heart of this au-
tomatic configuration system is the Network Port
Manager.
The Network Port Manager initiates auto-negotiation in
the external PHY when necessary and monitors the re-
sults. When auto-negotiation is complete, the Network
Port Manager sets up the MAC to be consistent with
the negotiated configuration. The Network Port Man-
ager auto-negotiation sequence requires that the exter-
nal PHY respond to the auto-negotiation request within
4 seconds. Otherwise, system software will be required
to properly control and configure the external PHY at-
tached to the MII. After auto negotiation is complete,
the Network Port Manager generates MII management
frames about once every 900 ms to monitor the status
of the external PHY.
The Network Port Manager is enabled when the Dis-
able Port Manager (DISPM) bit (CMD3, bit 14) is
cleared to 0.
Auto-Negotiation
The external PHY and its link partner may have one or
more of the following capabilities: 100BASE-T4,
100BASE-TX Full-/Half-Duplex, 10BASE-T Full-/Half-
Duplex, and MAC Control PAUSE frame processing.
During the auto-negotiation process the two PHY de-
vices exchange information about their capabilities and
then select the best mode of operation that is common
to both devices. The modes of operation are prioritized
according to the order shown in Table 11 (with the high-
est priority shown at the top of the table).
Table 11. Auto-Negotiation Capabilities
Auto-Negotiation goes further by providing a message-
based communication scheme called,
Next Pages
, be-
fore connecting to the Link Partner.
The Network Port
Manager does not support this feature. However, the
host CPU can disable the Network Port Manager and
manage Next Pages by accessing the PHY device
through the PHY Access Register.
The host CPU can
disable the Network Port Manager by setting the Dis-
able Port Manager (DISPM) bit (CMD3, bit 14) to 1.
(The DISPM bit corresponds to the Disable Auto-Nego-
tiation Auto Setup (DANAS) bit in BCR32 of older
PCnet family devices.)
Network Speed
Physical Network Type
200 Mbps
100BASE-X, Full Duplex
100 Mbps
100BASE-T4, Half Duplex
100 Mbps
100BASE-X, Half Duplex
20 Mbps
10BASE-T, Full Duplex
10 Mbps
10BASE-T, Half Duplex
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
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| AM79C978 | 制造商:AMD 制造商全稱:Advanced Micro Devices 功能描述:Single-Chip 1/10 Mbps PCI Home Networking Controller |
| AM79C978A | 制造商:AMD 制造商全稱:Advanced Micro Devices 功能描述:Single-Chip 1/10 Mbps PCI Home Networking Controller |
| AM79C978AKC\\W | 制造商:Advanced Micro Devices 功能描述: |
| AM79C978AKC\W | 制造商:Advanced Micro Devices 功能描述: |
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