參數(shù)資料
型號(hào): AS3543-ECTP
廠商: ams
文件頁數(shù): 43/92頁
文件大小: 0K
描述: IC CODEC AUDIO FRONT END 68CTBGA
標(biāo)準(zhǔn)包裝: 4,000
類型: 音頻編解碼器
應(yīng)用: 便攜式音頻,電話
安裝類型: 表面貼裝
封裝/外殼: 68-TFBGA
供應(yīng)商設(shè)備封裝: 68-CTBGA(6x6)
包裝: 帶卷 (TR)
www.austriamicrosystems.com
Revision 1.11
47 - 91
AS3543 3v2
Data Sheet - D e t a i l e d D e s c r i p t i o n - S Y S T E M F u n c t i o n s
STATUS CHANGE
The IRQ gets active when the source-state changes. The change bit and the status can be read to notice which inter-
rupt was the source. The IRQ stays active until the corresponding interrupt register gets read.
10.4.3 De-bouncer
There is a de-bounce function implemented for USB and CHARGER. Since these 2 signals can be unstable for the
phase of plug-in or unplug, a de-bounce time of 512ms/256ms/128ms/8ms can be selected by 2 bits in the
IRQ_ENRD_4 register (27h).
10.4.4 Interrupt Sources
26 IRQ events will activate the XIRQ pin:
Headphone connected
Headphone over-current
Microphone connected
Microphone remote control
Voice activation threshold reached
RTC sec/min elapsed
10bit ADC end of conversion
IS changed (active/inactive)
USB changed (connect/disconnect)
Charger changed (end of charge or connect/disconnect)
Battery temperature high (at 45C or 55C with 100k
NTC)
Junction temperature high
RTC watchdog (e.g. after battery was changed)
Battery low (Brown-out voltage reached)
Wake-up from hibernation
Power-up key (pin PWRUP) pressed
Power rail monitor: over-voltage PVDD1, PVDD2, CVDD1, CVDD2, DCDC15
Power rail monitor: under-voltage PVDD1, PVDD2, CVDD1, CVDD2, AVDD27
10.4.5 Register Description
Table 35. Interrupt Related Register
Name
Base
Offset
Description
2-wire serial
1A-3h
Control of XIRQ signal, polarity and drive
2-wire serial
1Ch
Enables writings to extended register 1Ah-3 and 1Ah-5
2-wire serial
23h
Enable/disable PMU interrupts
2-wire serial
24h
Enable/disable wake-up, voice and PMU interrupts
2-wire serial
25h
Enable/disable charger, USB and supervisor interrupts
2-wire serial
26h
Enable/disable junction temperature, headphone, microphone
and I2S interrupt
2-wire serial
27h
Enable/disable PMU, RTC, ADC10 and microphone interrupt,
set VBUS and CHGIN debounce time
ams
AG
Technical
content
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