參數資料
型號: CR16HCT5VJE7Y
英文描述: Microcontroller
中文描述: 微控制器
文件頁數: 11/157頁
文件大小: 1256K
代理商: CR16HCT5VJE7Y
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TDX1
CMOS High
*
USART 1 transmit data output (shared with PG6).
TDX2
CMOS High
*
USART 2 transmit data output (shared with PG1).
CANTx
CMOS High
CAN output.
Table 4
Input/Output Pins
Signal
Type
Active
Pin (* for a
shared pin)
Function
PF[0:7]
CMOS High
*
Generic I/O port. Shared with T1A, T1B, TIO1, TIO2, T2A, T2B, TIO3, TIO4.
PG[0:7]
CMOS High
*
Generic I/O port. Shared with RDX2, TDX2, CKX2, TIO5, TIO6, RDX1, TDX1,
CKX1.
PB[0:7]
CMOS High
*
Generic I/O port.
PC[0:7]
CMOS High
*
Generic I/O port.
PL[0:7]
CMOS High
*
Generic I/O port. Shared with 6 comparator pins, MIWU16 on PL0:3.
PH[0:7]
CMOS High
*
Generic I/O port. Shared with ADC input channels 8-11, MWCS, MDIDO,
MDODI, MSK; MIWU16 on PH4:7.
PI[0:7]
CMOS High
*
Generic I/O port. Shared with ADC input channels 0-7.
T1A
CMOS Prog
*
Timer 1 input A. Shared with I/O port pin PF0.
T2A
CMOS Prog
*
Timer 2 input A. Shared with I/O port pin PF4.
TIO[0:7]
CMOS Prog
*
Versatile timer unit I/Os. Shared with PF2:3, PF6:7, PG3:4, PL6:7.
MDIDO
CMOS High
*
Master In/Slave Out port: SPI/Microwire. Shared with I/O pin PH5,
MDODI
CMOS High
*
Master Out/Slave In port: SPI/Microwire. Shared with I/O pin PH6.
MSK
CMOS Prog
*
SPI/Microwire clock. Shared with I/O pin PH7.
CKX1
CMOS High
*
USART 1 clock. Shared with I/O pin PG7.
CKX2
CMOS High
*
USART 2 clock. Shared with I/O pin PG2
SCL
CMOS High
ACCESS.bus clock I/O.
SDA
CMOS High
ACCESS.bus data I/O.
Table 5
Power Supply
Signal
Function
Vcc
Main digital power supply (4 total).
Vref
Voltage reference supply for analog to digital converter.
AVcc
Analog power supply for analog/digital converter.
AGND Analog reference ground supply.
GND
Main digital reference ground (8 total).
Table 3
Output Pins
Signal
Type
Active
Pin (* for
a shared pin)
Function
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