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| 型號(hào)： | CR16HCT5VJE7Y |
| 英文描述： | Microcontroller |
| 中文描述： | 微控制器 |
| 文件頁(yè)數(shù)： | 99/157頁(yè) |
| 文件大?。?/td> | 1256K |
| 代理商： | CR16HCT5VJE7Y |
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20.5.3
As shown in Figure 64, a receive procedure starts as soon as
the user has set the buffer from the RX_NOT_ACTIVE state
into the RX_READY state. The status section of CNSTAT
register is set from 0000
2
to 0010
2
. When a message is re-
ceived, the buffer will be RX_BUSYx during the copy
process from the hidden receive buffer into the message
buffer. Afterwards this buffer is RX_FULL. Now the CPU can
read the buffer data and either reset the buffer status to
RX_READY or receive a new frame before the CPU reads
the buffer. In the second case, the buffer state will automati-
cally change to RX_OVERRUN to indicate that at least one
message was lost. During the copy process the buffer will
again be RX_BUSYx for a short time, but in this case the CN-
STAT status section will be 0101
2
, as the buffer was
RX_FULL (0100
2
) before. After finally reading the last re-
ceived message, the CPU can reset the buffer to
RX_READY.
RX Buffer States
20.6
In order to transmit a CAN message, the user has to config-
ure the message buffer by changing the buffer status to
TX_NOT_ACTIVE. The buffer is configured for transmission
if the ST[3] bit of the buffer status code (CNSTAT) is set to ‘1’.
In TX_NOT_ACTIVE status, the buffer is ready to receive
data from the CPU. After receiving all transmission data (ID,
data bytes, DLC and PRI), the CPU can start the transmis-
sion by writing TX_ONCE into the buffer status register. Dur-
ing the transmission the status of the buffer is TX_BUSYx.
After successful transmission CR16CAN will reset the buffer
status to TX_NOT_ACTIVE. When the transmission process
fails, the buffer condition will remain TX_BUSYx for re-trans-
mission until the frame was successfully transmitted or the
CPU has canceled the transmission request.
In order to
Send a Remote Frame
(Remote Transmission
Request) to other CAN nodes, the user needs to set the RTR
bit of the message identifier to “1” (see Storage of Remote
Messages on page 108) and change the status of the mes-
sage buffer to TX_ONCE. After this remote frame has been
transmitted successfully, this message buffer will automati-
TRANSMIT STRUCTURE
cally enter the RX_READY state and is ready to receive the
appropriate answer. Note that the mask bits RTR/XRTR need
to be set to receive a data frame (RTR = 0) in a buffer which
was configured to transmit a remote frame (RTR = 1).
To answer Remote Frames
if the CPU writes TX_RTR in
the buffer status register, the buffer will wait for a remote
frame. When a remote frame passes the acceptance filtering
mask of one or more buffers, the buffer status will change to
TX_ONCE_RTR, the contents of the buffer will be transmit-
ted and afterwards CR16CAN will write TX_RTR in the status
code register again.
If the CPU writes TX_ONCE_RTR in the buffer status, the
contents of the buffer will be transmitted, and the successful
transmission the buffer goes into the “wait for Remote
Frame” condition TX_RTR.
20.6.1
After writing TX_ONCE in the buffer status, the transmission
process begins and the BUSY-bit is set. As soon as a buffer
gets the TX_BUSY status, the buffer is not accessible any-
more by the CPU except for the ST[3:1] bits of the CNSTAT
register. Starting with the beginning of the CRC field of the
current frame, CR16CAN looks for another buffer transmit re-
quest and selects the buffer with the highest priority for the
next transmission by changing the buffer state from
TX_ONCE to TX_BUSY. This transmit request can be can-
celed by the CPU or can be overwritten by another transmit
request of a buffer with a higher priority as long as the trans-
mission of the next frame has not yet started. This means
that between the beginning of the CRC field of the current
frame and the transmission start of the next frame, two buff-
ers, the current buffer and the buffer scheduled for the next
transmission, are in the BUSY status. In order to cancel the
transmit request of the next frame, the CPU has to change
the buffer state to TX_NOT_ACTIVE. When the transmit re-
quest has been overwritten by another request of a higher
priority buffer, CR16CAN changes the buffer state from
TX_BUSY to TX_ONCE. Thus, the transmit request remains
pending. Figure 64 further illustrates the transmit timing.
Transmit Scheduling
If the transmit process fails or the arbitration is lost, the trans-
mission process will be stopped and will continue after the in-
terrupting reception or the error signaling has finished (see
Figure 65). In that case a new buffer select follows and the
TX process is executed again.
TX_BUSY
current buffer
begin selection of next buffer
if new tx_request
TX_BUSY
next buffer
SOF
1 BIT 12/29 + 6 BIT
ARBITRATION FIELD DATA FIELD
+ CONTROL
(IF PRESENT)
n * 8 BIT
CRC
FIELD
ACK
FIELD
2 BIT
EOF
7 BIT
16 BIT
IFS
3 BIT
Figure 64.
Data Transmission
BUS IDLE
CPU write TX_ONCE
in buffer status
相關(guān)PDF資料 |
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| CR16HCT5VJE8Y | Microcontroller |
| CR16HCT5VJE9Y | Microcontroller |
| CR16HCT9 | |
| CR16HCT9VJE7 | Microcontroller |
| CR16HCT9VJE7Y | Microcontroller |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
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| CR16HCT5VJE8Y | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Microcontroller |
| CR16HCT5VJE9Y | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Microcontroller |
| CR16HCT5VJEXY | 制造商:NSC 制造商全稱:National Semiconductor 功能描述:CR16MCT9/CR16MCT5/CR16HCT9/CR16HCT5 16-Bit Reprogrammable/ROM Microcontroller |
| CR16HCT9 | 制造商:NSC 制造商全稱:National Semiconductor 功能描述:CR16MCT9/CR16MCT5/CR16HCT9/CR16HCT5 16-Bit Reprogrammable/ROM Microcontroller |
| CR16HCT9VJE7 | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Microcontroller |
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