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參數(shù)資料
| 型號： | CY7C1248KV18-400BZXC |
| 廠商： | CYPRESS SEMICONDUCTOR CORP |
| 元件分類： | SRAM |
| 英文描述： | 2M X 18 DDR SRAM, 0.45 ns, PBGA165 |
| 封裝： | 13 X 15 MM, 1.40 MM HEIGHT, LEAD FREE, MO-216, FBGA-165 |
| 文件頁數(shù)： | 3/28頁 |
| 文件大小： | 907K |
| 代理商： | CY7C1248KV18-400BZXC |
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CY7C1246KV18, CY7C1257KV18
CY7C1248KV18, CY7C1250KV18
Document Number: 001-57834 Rev. *B
Page 11 of 28
Truth Table
The truth table for the CY7C1246KV18, CY7C1257KV18, CY7C1248KV18, and CY7C1250KV18 follow.[3, 4, 5, 6, 7, 8]
Operation
K
LD
R/W
DQ
Write cycle:
Load address; wait one cycle;
input write data on consecutive K and K rising edges.
L–H
L
D(A) at K(t + 1)
D(A+1) at K(t + 1)
Read cycle: (2.0 cycle latency)
Load address; wait two cycles;
read data on consecutive K and K rising edges.
L–H
L
H
Q(A) at K(t + 2)
Q(A+1) at K(t + 2)
NOP: No operation
L–H
H
X
High Z
Standby: Clock stopped
Stopped
X
Previous state
Write Cycle Descriptions
The write cycle description table for CY7C1246KV18 and CY7C1248KV18 follows.[3, 9]
BWS0/
NWS0
BWS1/
NWS1
K
Comments
L
L–H
–
During the data portion of a write sequence
CY7C1246KV18
both nibbles (D[7:0]) are written into the device.
CY7C1248KV18
both bytes (D[17:0]) are written into the device.
L
–
L–H During the data portion of a write sequence
CY7C1246KV18
both nibbles (D[7:0]) are written into the device.
CY7C1248KV18
both bytes (D[17:0]) are written into the device.
L
H
L–H
–
During the data portion of a write sequence
CY7C1246KV18
only the lower nibble (D[3:0]) is written into the device, D[7:4] remains unaltered.
CY7C1248KV18
only the lower byte (D[8:0]) is written into the device, D[17:9] remains unaltered.
L
H
–
L–H During the data portion of a write sequence
CY7C1246KV18
only the lower nibble (D[3:0]) is written into the device, D[7:4] remains unaltered.
CY7C1248KV18
only the lower byte (D[8:0]) is written into the device, D[17:9] remains unaltered.
H
L
L–H
–
During the data portion of a write sequence
CY7C1246KV18
only the upper nibble (D[7:4]) is written into the device, D[3:0] remains unaltered.
CY7C1248KV18
only the upper byte (D[17:9]) is written into the device, D[8:0] remains unaltered.
H
L
–
L–H During the data portion of a write sequence
CY7C1246KV18
only the upper nibble (D[7:4]) is written into the device, D[3:0] remains unaltered.
CY7C1248KV18
only the upper byte (D[17:9]) is written into the device, D[8:0] remains unaltered.
H
L–H
–
No data is written into the devices during this portion of a write operation.
H
–
L–H No data is written into the devices during this portion of a write operation.
Notes
3. X = “Don’t Care,” H = Logic HIGH, L = Logic LOW,
represents rising edge.
4. Device powers up deselected with the outputs in a tristate condition.
5. “A” represents address location latched by the devices when transaction was initiated. A + 1 represents the address sequence in the burst.
6. “t” represents the cycle at which a read/write operation is started. t + 1 and t + 2 are the first and second clock cycles succeeding the “t” clock cycle.
7. Data inputs are registered at K and K rising edges. Data outputs are delivered on K and K rising edges as well.
8. Ensure that when clock is stopped K = K and C = C = HIGH. This is not essential, but permits most rapid restart by overcoming transmission line charging symmetrically.
9. Is based on a write cycle that was initiated in accordance with the Write Cycle Descriptions table. NWS0, NWS1, BWS0, BWS1, BWS2, and BWS3 can be altered on
different portions of a write cycle, as long as the setup and hold requirements are achieved.
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| CY7C1248KV18-450BZXC | 功能描述:靜態(tài)隨機存取存儲器 36MB (2Mx18) 1.8v 450MHz DDR II 靜態(tài)隨機存取存儲器 RoHS:否 制造商:Cypress Semiconductor 存儲容量:16 Mbit 組織:1 M x 16 訪問時間:55 ns 電源電壓-最大:3.6 V 電源電壓-最小:2.2 V 最大工作電流:22 uA 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 安裝風格:SMD/SMT 封裝 / 箱體:TSOP-48 封裝:Tray |
| CY7C12501KV | 制造商:Rochester Electronics LLC 功能描述: 制造商:Cypress Semiconductor 功能描述: |
| CY7C12501KV18-400BZC | 功能描述:靜態(tài)隨機存取存儲器 1Mb x 36 400 MHz Sync 靜態(tài)隨機存取存儲器 RoHS:否 制造商:Cypress Semiconductor 存儲容量:16 Mbit 組織:1 M x 16 訪問時間:55 ns 電源電壓-最大:3.6 V 電源電壓-最小:2.2 V 最大工作電流:22 uA 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 安裝風格:SMD/SMT 封裝 / 箱體:TSOP-48 封裝:Tray |
| CY7C12501KV18-400BZXC | 功能描述:靜態(tài)隨機存取存儲器 1Mb x 36 400 MHz Sync 靜態(tài)隨機存取存儲器 RoHS:否 制造商:Cypress Semiconductor 存儲容量:16 Mbit 組織:1 M x 16 訪問時間:55 ns 電源電壓-最大:3.6 V 電源電壓-最小:2.2 V 最大工作電流:22 uA 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 安裝風格:SMD/SMT 封裝 / 箱體:TSOP-48 封裝:Tray |
| CY7C12501KV18-450BZXC | 功能描述:IC SRAM 36MBIT 450MHZ 165-FPBGA RoHS:是 類別:集成電路 (IC) >> 存儲器 系列:- 標準包裝:150 系列:- 格式 - 存儲器:EEPROMs - 串行 存儲器類型:EEPROM 存儲容量:4K (2 x 256 x 8) 速度:400kHz 接口:I²C，2 線串口 電源電壓:2.5 V ~ 5.5 V 工作溫度:-40°C ~ 85°C 封裝/外殼:8-VFDFN 裸露焊盤 供應(yīng)商設(shè)備封裝:8-DFN（2x3） 包裝:管件 產(chǎn)品目錄頁面:1445 (CN2011-ZH PDF) |
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